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Daniel Stenberg wrote:

[oooh, missed a spot!]

> > The IDE seems to use plain parallel I/O.
> What is this assumption based on?

The schematics. The CPU only has address and data connections to the ATA
port. Specifically, the DMARQ and DMACK pins are not connected.

Also, there's only one DMA exception vector used in the vector table and
I'm pretty sure that one is for the high-speed serial port.

I intend to start looking at that serial port handling tonight.

/Björn

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