Rockbox mail archiveSubject: Re: [Qs] serial port; interrupts; memory structure
From: Linus Nielsen Feltzing (linus_at_haxx.se)
Carlo Martino wrote:
The SC0 tx pin is connected to the MAS for sending MP3 data.
> (*) Which pins on the SH-1 control the interrupts?
PB0-3 and PA0-3, if I remember correctly. Why?
> (*) There doesn't seem to be any cache on the SH-1. Rather, the on-chip
Yes, that is correct.
> (*) The DMA capabilities of the SH-1 allow direct access between on-chip
We use it to feed the serial interface with data when playing music.
> (*) Is there DMA between the off-chip RAM and the hard drive? I figure's
No, the CPU has to do the ATA transfers, because the hardware design
Page was last modified "Jan 10 2012" The Rockbox Crew