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Subject: using $(SILENT) in Makefiles

using $(SILENT) in Makefiles

From: Frederic Devernay <frederic.devernay_at_m4x.org>
Date: 2006-01-25

Hello,

Just a suggestion:
Would it be possible to fix the Makefiles so that $(SILENT) is used
instead of @ for _anything_ but '@echo "xxx"' and "@$(MAKE)..." ?

Normally, we should be able to use "make V=1" to see what "make"
actually does (i.e. commands that you can cut and paste in a shell), but
this becomes less and less the case. Some time ago, I think the rockbox
Makefiles were designed that way.

I have a patch ready, of course, but you'd spend more time verifying it
that doing a quick
fgrep -r @$ .
in the rockbox sources, and find/replace.
The commands affected are mainly
$(CC) (not all of them, of course)
$(OC)
$(DLLTOOL)
$(DLLWRAP)
$(AR)
$(RANLIB)

Cheers,
Fred
Received on Wed Jan 25 22:46:05 2006


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