Rockbox mail archiveSubject: Re: Sansa: avoid channel swapping issues (yippie yeeha, I found the shifting problem)
Re: Sansa: avoid channel swapping issues (yippie yeeha, I found the shifting problem)
From: Michael Sevakis <jethead71_at_sbcglobal.net>
Date: Tue, 22 May 2007 08:35:17 -0400
The reason for the need to shift is mismatched clock settings and these must be right since e200 is the only pp target running the codec in slave mode. Heh! Fixed...almost.
Now I need the correct settings for the following registers:
0x70002808 - i2s clock - change to something less than 0x3f :P
I've got 'em close but the it's running a couple semitones sharp.
Perhaps this thing should be clocked as the OF does it? I tried that but something's missing.
Something noone has answered with "yes" or "no" yet:
To avoid channel swapping in all situations and leave the CPU load lighter, should we not just lose the two least significant bits and simply use 32-bit L-R pairs as is done in my patch? As soon as the reason for the two bit delay is discovered, remove the shifting. That still leaves a dynamic range of ~80db which is still larger than the new volume range and sounds just fine really. I'm not at all for increasing the number of FIQs.
I'll emphasize again that PP502x (maybe 5002 as well) based iPods, since they need no shift hack, will also be able to send data directly out of the PCM buffer, lighten their FIQ load and become candidates for DMA audio transfer. Those with iPods can take about 5min to verify that it also works for them. Time to dump the excess of 32-bit samples imho since it is now known how to use 16-bit.
Based on an idea of jhMikeS I modified svn code (i2s-pp.c) in the following way:
// IISFIFO_CFG |= 0x33; /* 12 slots full/empty config */
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