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Subject: Re: Power Efficiency Tradeoffs

Re: Power Efficiency Tradeoffs

From: Bertrik Sikken <bertrik_at_sikken.nl>
Date: Mon, 21 Jan 2008 23:43:53 +0100

Burelli Luca wrote:
>
> On Sat, 12 Jan 2008, Catalin Patulea wrote:
>
>> - I believe (correct me if I'm wrong) that, in general, power
>> consumption is proportional to the core frequency. Let the power
>> consumptions of the cores be P_1 = k*f_1 and P_2 = k*f_2.
>
> An accurate estimation of power consumption in digital electronics is
> not so easy to figure out. However, as a rule of thumb, you may assume
> there's a constant power dissipation which is due to leakage (non-ideal
> switches allowing current to flow even where and when it should not),
> and a "dynamic" power dissipation that is proportional to Vdd (the
> switching voltage) and to _the square_ of the switching frequency. So
> the above would be better written as P_1 = P_{1,leak} + k * f_1^2,
> meaning that if you run the CPU twice as fast, you need four times the
> energy (ignoring leakage). That's why clock throttling helps _a lot_ in
> reducing battery drain!
>
> Hope I remembered things correctly from my University classes :-)

I think you have the relations mixed up.

In one clock tick, a bunch of internal nodes acting as tiny capacitors
need to be charged or discharged, dissipating an amount of energy equal
to the energy contained in those capacitors.
A charged capacitor C has energy E = 1/2 * C * V * V, which demonstrates
the quadratic relation between voltage and consumed dynamic power.

Increasing the clock simply means that this happens more often each
second, which points to a linear relation between frequency and
dynamic power.

Kind regards,
Bertrik
Received on 2008-01-21


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