From 61442e6e37e8b0cd5e925399b0d9e211804ece6b Mon Sep 17 00:00:00 2001
From: =?utf-8?q?Rafa=C3=ABl=20Carr=C3=A9?= <rafael.carre@gmail.com>
Date: Mon, 6 Apr 2009 00:37:44 +0200
Subject: [PATCH 3/5] Sansa AMS: Fix a few mistakes in DMA code

DMAC_INT_TC_CLEAR is a write-only reg
HIGH bits of DMAC_SYNC mean synchronisation logic disabled.
Also, according to the OF and to tests, all the peripherals we use run at the same frequency (PCLK?).
---
 firmware/target/arm/as3525/dma-pl081.c |    7 ++-----
 1 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/firmware/target/arm/as3525/dma-pl081.c b/firmware/target/arm/as3525/dma-pl081.c
index 8a97986..52fd90f 100644
--- a/firmware/target/arm/as3525/dma-pl081.c
+++ b/firmware/target/arm/as3525/dma-pl081.c
@@ -48,7 +48,7 @@ void dma_release(void)
 
 void dma_init(void)
 {
-    DMAC_SYNC = 0;
+    DMAC_SYNC = 0xffff; /* disable synchronisation logic */
     VIC_INT_ENABLE |= INTERRUPT_DMAC;
 }
 
@@ -88,9 +88,6 @@ void dma_enable_channel(int channel, void *src, void *dst, int peri,
 
     DMAC_CH_CONTROL(channel) = control;
 
-    /* only needed if DMAC and Peripheral do not run at the same clock speed */
-    DMAC_SYNC |= (1<<peri);
-
     /* we set the same peripheral as source and destination because we always
      * use memory-to-peripheral or peripheral-to-memory transfers */
     DMAC_CH_CONFIGURATION(channel) =
@@ -116,7 +113,7 @@ void INT_DMAC(void)
                 panicf("DMA error, channel %d", channel);
 
             /* clear terminal count interrupt */
-            DMAC_INT_TC_CLEAR |= (1<<channel);
+            DMAC_INT_TC_CLEAR = (1<<channel);
 
             if(dma_callback[channel])
                 dma_callback[channel]();
-- 
1.6.1.3