Rockbox.org home
release
dev builds
extras
themes manual
wiki
device status forums
mailing lists
IRC bugs
patches
dev guide



Rockbox mail archive

Subject: Re: Cowon D2 EABI

Re: Cowon D2 EABI

From: Andrew Poelstra <asp11_at_sfu.ca>
Date: Tue, 15 Jun 2010 10:31:35 -0700 (PDT)

> On 14/06/2010 23:14, Andrew Poelstra wrote:
> > There are two ways intuitively to do this:
> > 1. I believe the ARM proc in the D2 has a PIT (periodic interval timer) that can be used as a clock counter, if you want a specific time period. It's a bit of work to initialize it but nothing major. The USB driver in u-boot uses this method.
> >
> > 2. If you're just counting clock cycles, the 'volatile' specifier should prevent gcc's loop optimizations, no?
> >
> 1. The delays we are looking for here are tiny (just a few cycles). I'm
> not sure a timer is going to be helpful here.
>
> 2. Yes, but this generates additional code since extra ldr/str
> instructions are generated each time the loop counter is accessed,
>
> The fact is, this code is horrible and the slightest tweak makes
> unexpected things go wrong. It's used for I2C reads/writes, and if the
> timing is wrong it can cause subtle errors such as occasionally missing
> touch screen presses. These are read relatively frequently, so we don't
> want to waste too much time busy-waiting either.
>
> The "current" code was very carefully written so that it works in all of
> the 32/48/192Mhz clock speeds used in Rockbox (or at least did with the
> old compiler).
>
> If any changes are made to this code, it needs to be tested *very*
> carefully for correct operation at all speeds. Just tweaking the code
> and committing the first one that "looks like it works" isn't going to
> cut it. Which is why my preference was to give me a few days to look
> into it properly all along....
>
> Rob.

Reading the tick register in the PIT is only one LDR more work than
reading a loop counter from a processor register. I don't think it
would slow you down enough to mess up the loop, and it would give
you consistent timing across compilation changes.

My only concern would be some players not having a PIT at all.

What's the smallest processor-clock-to-I2C-clock ratio we have? (At
work right now I have a 250Mhz proc and 48Khz I2C doing audio ;))

Andrew
Received on 2010-06-15


Page was last modified "Jan 10 2012" The Rockbox Crew
aaa