Index: bootloader/lyre_proto1.c =================================================================== --- bootloader/lyre_proto1.c (revisão 20588) +++ bootloader/lyre_proto1.c (cópia de trabalho) @@ -22,6 +22,9 @@ /* Include Standard files */ #include "kernel.h" #include "system.h" +#include "button.h" +#include "lcd.h" +#include "common.h" /* Show the Rockbox logo - in show_logo.c */ extern int show_logo(void); @@ -31,6 +34,23 @@ /* Initialize Rockbox kernel */ kernel_init(); + /* Initialize LCD */ + lcd_init_device(); + + /* Show Rockbox logo */ + show_logo(); + + /* Initialize buttons */ + button_init_device(); + int btn = button_read_device(); + + /* Enable bootloader messages if any button is pressed */ + if (btn) + { + lcd_clear_display(); + verbose = true; + } + /* Never returns */ while(1) ; } Index: firmware/export/at91sam9260.h =================================================================== --- firmware/export/at91sam9260.h (revisão 20588) +++ firmware/export/at91sam9260.h (cópia de trabalho) @@ -9,6 +9,9 @@ * * Copyright (C) 2009 by Jorge Pinto * + * This code had as reference the Atmel files of project named: + * "at91sam9260_getting_started_1.0". + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 @@ -19,6 +22,99 @@ * ****************************************************************************/ +/* SPI_CR : (SPI Offset: 0x0) SPI Control Register */ +#define AT91C_SPI_SPIEN (0x1 << 0) /* (SPI) SPI Enable */ +#define AT91C_SPI_SPIDIS (0x1 << 1) /* (SPI) SPI Disable */ +#define AT91C_SPI_SWRST (0x1 << 7) /* (SPI) SPI Software reset */ +#define AT91C_SPI_LASTXFER (0x1 << 24) /* (SPI) SPI Last Transfer */ +/* SPI_MR : (SPI Offset: 0x4) SPI Mode Register */ +#define AT91C_SPI_MSTR (0x1 << 0) /* (SPI) Master/Slave Mode */ +#define AT91C_SPI_PS (0x1 << 1) /* (SPI) Peripheral Select */ +#define AT91C_SPI_PS_FIXED (0x0 << 1) /* (SPI) Fixed +Peripheral Select */ +#define AT91C_SPI_PS_VARIABLE (0x1 << 1) /* (SPI) Variable +Peripheral Select */ +#define AT91C_SPI_PCSDEC (0x1 << 2) /* (SPI) Chip Select Decode */ +#define AT91C_SPI_FDIV (0x1 << 3) /* (SPI) Clock Selection */ +#define AT91C_SPI_MODFDIS (0x1 << 4) /* (SPI) Mode Fault Detection */ +#define AT91C_SPI_LLB (0x1 << 7) /* (SPI) Clock Selection */ +#define AT91C_SPI_PCS (0xF << 16) /* (SPI) Peripheral Chip Select */ +#define AT91C_SPI_DLYBCS (0xFF << 24) /* (SPI) Delay Between Chip +Selects */ +/* SPI_RDR : (SPI Offset: 0x8) Receive Data Register */ +#define AT91C_SPI_RD (0xFFFF << 0) /* (SPI) Receive Data */ +#define AT91C_SPI_RPCS (0xF << 16) /* (SPI) Peripheral Chip Select +Status */ +/* SPI_TDR : (SPI Offset: 0xc) Transmit Data Register */ +#define AT91C_SPI_TD (0xFFFF << 0) /* (SPI) Transmit Data */ +#define AT91C_SPI_TPCS (0xF << 16) /* (SPI) Peripheral Chip Select +Status */ +/* SPI_SR : (SPI Offset: 0x10) Status Register */ +#define AT91C_SPI_RDRF (0x1 << 0) /* (SPI) Receive Data Register +Full */ +#define AT91C_SPI_TDRE (0x1 << 1) /* (SPI) Transmit Data Register +Empty */ +#define AT91C_SPI_MODF (0x1 << 2) /* (SPI) Mode Fault Error */ +#define AT91C_SPI_OVRES (0x1 << 3) /* (SPI) Overrun Error Status */ +#define AT91C_SPI_ENDRX (0x1 << 4) /* (SPI) End of Receiver Transfer */ +#define AT91C_SPI_ENDTX (0x1 << 5) /* (SPI) End of Receiver Transfer */ +#define AT91C_SPI_RXBUFF (0x1 << 6) /* (SPI) RXBUFF Interrupt */ +#define AT91C_SPI_TXBUFE (0x1 << 7) /* (SPI) TXBUFE Interrupt */ +#define AT91C_SPI_NSSR (0x1 << 8) /* (SPI) NSSR Interrupt */ +#define AT91C_SPI_TXEMPTY (0x1 << 9) /* (SPI) TXEMPTY Interrupt */ +#define AT91C_SPI_SPIENS (0x1 << 16) /* (SPI) Enable Status */ +/* SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register */ +/* SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register */ +/* SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register */ +/* SPI_CSR : (SPI Offset: 0x30) Chip Select Register */ +#define AT91C_SPI_CPOL (0x1 << 0) /* (SPI) Clock Polarity */ +#define AT91C_SPI_NCPHA (0x1 << 1) /* (SPI) Clock Phase */ +#define AT91C_SPI_CSAAT (0x1 << 3) /* (SPI) Chip Select Active After +Transfer */ +#define AT91C_SPI_BITS (0xF << 4) /* (SPI) Bits Per Transfer */ +#define AT91C_SPI_BITS_8 (0x0 << 4) /* (SPI) 8 Bits Per +transfer */ +#define AT91C_SPI_BITS_9 (0x1 << 4) /* (SPI) 9 Bits Per +transfer */ +#define AT91C_SPI_BITS_10 (0x2 << 4) /* (SPI) 10 Bits +Per transfer */ +#define AT91C_SPI_BITS_11 (0x3 << 4) /* (SPI) 11 Bits +Per transfer */ +#define AT91C_SPI_BITS_12 (0x4 << 4) /* (SPI) 12 Bits +Per transfer */ +#define AT91C_SPI_BITS_13 (0x5 << 4) /* (SPI) 13 Bits +Per transfer */ +#define AT91C_SPI_BITS_14 (0x6 << 4) /* (SPI) 14 Bits +Per transfer */ +#define AT91C_SPI_BITS_15 (0x7 << 4) /* (SPI) 15 Bits +Per transfer */ +#define AT91C_SPI_BITS_16 (0x8 << 4) /* (SPI) 16 Bits +Per transfer */ +#define AT91C_SPI_SCBR (0xFF << 8) /* (SPI) Serial Clock Baud Rate */ +#define AT91C_SPI_DLYBS (0xFF << 16) /* (SPI) Delay Before SPCK */ +#define AT91C_SPI_DLYBCT (0xFF << 24) /* (SPI) Delay Between Consecutive +Transfers */ + +/* Register definition for SPI1 peripheral */ +#define AT91C_SPI1_IER (*(volatile unsigned long*) 0xFFFCC014) /* (SPI1) +Interrupt Enable Register */ +#define AT91C_SPI1_RDR (*(volatile unsigned long*) 0xFFFCC008) /* (SPI1) + Receive Data Register */ +#define AT91C_SPI1_SR (*(volatile unsigned long*) 0xFFFCC010) /* (SPI1) + Status Register */ +#define AT91C_SPI1_IMR (*(volatile unsigned long*) 0xFFFCC01C) /* (SPI1) + Interrupt Mask Register */ +#define AT91C_SPI1_TDR (*(volatile unsigned long*) 0xFFFCC00C) /* (SPI1) + Transmit Data Register */ +#define AT91C_SPI1_IDR (*(volatile unsigned long*) 0xFFFCC018) /* (SPI1) + Interrupt Disable Register */ +#define AT91C_SPI1_CSR(a) (*(volatile unsigned long*) (0xFFFCC030 + 4*(a))) +/* (SPI1) Chip Select Register */ +#define AT91C_SPI1_CR (*(volatile unsigned long*) 0xFFFCC000) /* (SPI1) + Control Register */ +#define AT91C_SPI1_MR (*(volatile unsigned long*) 0xFFFCC004) /* (SPI1) + Mode Register */ + /* MATRIX_MRCR : (MATRIX Offset: 0x100) MRCR Register */ #define AT91C_MATRIX_RCA926I (0x1 << 0) /* (MATRIX) Remap Command for ARM926EJ-S Instruction Master */ Index: firmware/SOURCES =================================================================== --- firmware/SOURCES (revisão 20588) +++ firmware/SOURCES (cópia de trabalho) @@ -1268,6 +1268,7 @@ target/arm/at91sam/lyre_proto1/debug-lyre_proto1.c target/arm/at91sam/lyre_proto1/kernel-lyre_proto1.c target/arm/at91sam/lyre_proto1/lcd-lyre_proto1.c +target/arm/at91sam/lyre_proto1/spi-lyre_proto1.c target/arm/at91sam/lyre_proto1/system-lyre_proto1.c target/arm/at91sam/lyre_proto1/timer-lyre_proto1.c #endif Index: firmware/target/arm/at91sam/lyre_proto1/system-lyre_proto1.c =================================================================== --- firmware/target/arm/at91sam/lyre_proto1/system-lyre_proto1.c (revisão 20588) +++ firmware/target/arm/at91sam/lyre_proto1/system-lyre_proto1.c (cópia de trabalho) @@ -9,6 +9,9 @@ * * Copyright (C) 2009 by Jorge Pinto * + * This code had as reference the Atmel files of project named: + * "at91sam9260_getting_started_1.0". + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 @@ -24,28 +27,16 @@ #include "debug-target.h" #include "config.h" -/*----------------------------------------------------------------------------- - * Function Name : default_spurious_handler - * Object : default handler for spurious interrupt - *---------------------------------------------------------------------------*/ void default_spurious_handler(void) { while (1); } -/*----------------------------------------------------------------------------- - * Function Name : default_fiq_handler - * Object : default handler for fast interrupt - *---------------------------------------------------------------------------*/ void default_fiq_handler(void) { while (1); } -/*----------------------------------------------------------------------------- - * Function Name : default_irq_handler - * Object : default handler for irq - *---------------------------------------------------------------------------*/ void default_irq_handler(void) { #if defined(BOOTLOADER) @@ -53,12 +44,6 @@ #endif } -/*----------------------------------------------------------------------------- - * Function Name : lowlevel_init - * Object : This function performs very low level HW initialization - * this function can use a Stack, depending the compilation - * optimization mode - *---------------------------------------------------------------------------*/ void lowlevel_init(void) { unsigned char i = 0; @@ -148,3 +133,13 @@ /* Remap */ AT91C_MATRIX_MRCR = AT91C_MATRIX_RCA926I | AT91C_MATRIX_RCA926D; } + +void system_exception_wait(void) +{ + while (1); +} + +void system_reboot(void) +{ + while (1); +} Index: firmware/target/arm/at91sam/lyre_proto1/lcd-lyre_proto1.c =================================================================== --- firmware/target/arm/at91sam/lyre_proto1/lcd-lyre_proto1.c (revisão 20588) +++ firmware/target/arm/at91sam/lyre_proto1/lcd-lyre_proto1.c (cópia de trabalho) @@ -9,6 +9,10 @@ * * Copyright (C) 2009 by Jorge Pinto * + * This code had as reference many Open Source projects (both code and + * schematics) that uses this LCD. There is a good tutorial from + * Mr. James P. Lynch with title "Nokia 6100 LCD Display Driver". + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 @@ -19,9 +23,254 @@ * ****************************************************************************/ +#include "config.h" +#include "system.h" +#include "cpu.h" +#include "string.h" +#include "lcd.h" +#include "kernel.h" +#include "at91sam9260.h" +#include "spi-target.h" +#include "lcd-target.h" + + +void lcd_init_device(void) +{ + spi_lcd_init(); + + /* Configure LCD reset pin */ + AT91C_PIOB_OER |= AT91C_PIO_PB8; /* Configure the pin PB8 in + output */ + AT91C_PIOB_PER |= AT91C_PIO_PB8; /* Set the PIO controller in + PIO mode instead of peripheral mode */ + AT91C_PIOB_PPUDR |= AT91C_PIO_PB8; /* Disable pull-up */ + + AT91C_PIOB_CODR = AT91C_PIO_PB8; /* Reset the LCD */ + sleep(HZ/10); /* Delay of 100ms */ + AT91C_PIOB_SODR = AT91C_PIO_PB8; + sleep(HZ/10); /* Delay of 100ms */ + + spi_lcd_write_command(DISCTL); /* Display control(EPSON) */ + spi_lcd_write_data(0x0C); /* 12 = 1100 - CL dividing ratio [don't divide] + switching period 8H (default) */ + spi_lcd_write_data(0x20); + spi_lcd_write_data(0x00); + + spi_lcd_write_data(0x01); + + spi_lcd_write_command(COMSCN); /* Common scanning direction(EPSON) */ + spi_lcd_write_data(0x01); + + spi_lcd_write_command(OSCON); /* Internal oscialltor ON(EPSON)*/ + + spi_lcd_write_command(SLPOUT); /* Sleep out(EPSON) */ + spi_lcd_write_command(SLEEPOUT); /* Sleep out(PHILLIPS) */ + + spi_lcd_write_command(PWRCTR); /* Power ctrl(EPSON) */ + spi_lcd_write_data(0x0F); /* Everything on, no external reference + resistors */ + spi_lcd_write_command(BSTRON); /* Booset On(PHILLIPS) */ + + spi_lcd_write_command(DISINV); /* Invert display mode(EPSON) */ + spi_lcd_write_command(INVON); /* Invert display mode(PHILLIPS) */ + + spi_lcd_write_command(DATCTL); /* Data control(EPSON) */ + spi_lcd_write_data(0x03); /* Correct for normal sin7 */ + spi_lcd_write_data(0x00); /* Normal RGB arrangement */ + spi_lcd_write_data(0x02); /* 16-bit Grayscale Type A */ + + spi_lcd_write_command(MADCTL); /* Memory Access Control(PHILLIPS) */ + spi_lcd_write_data(0xC8); + + spi_lcd_write_command(COLMOD); /* Set Color Mode(PHILLIPS) */ + spi_lcd_write_data(0x02); + + spi_lcd_write_command(VOLCTR); /* Electronic volume, this is the + contrast/brightness(EPSON) */ + spi_lcd_write_data(0x24); /* Volume (contrast) setting - fine tuning, + original */ + spi_lcd_write_data(0x03); /* Internal resistor ratio - coarse adjustment */ + spi_lcd_write_command(SETCON); /* Set Contrast(PHILLIPS) */ + spi_lcd_write_data(0x30); + + spi_lcd_write_command(NOP); /* Nop(EPSON) */ + spi_lcd_write_command(NOPP); /* Nop(PHILLIPS) */ + + spi_lcd_write_command(DISON); /* Display on(EPSON) */ + spi_lcd_write_command(DISPON); /* Display on(PHILLIPS) */ + + lcd_clear(); /* Write all LCD at black */ +} + +void lcd_clear(void) +{ + int i; + + spi_lcd_write_command(PASET); + spi_lcd_write_data(0); + spi_lcd_write_data(131); + + spi_lcd_write_command(CASET); + spi_lcd_write_data(0); + spi_lcd_write_data(131); + + spi_lcd_write_command(RAMWR); + + for(i=0; i < (131*131)/2; i++) + { + spi_lcd_write_data((0>>4)&0x00FF); + spi_lcd_write_data(((0&0x0F)<<4)|(0>>8)); + spi_lcd_write_data(0&0x0FF); + } +} + +/*** hardware configuration ***/ +int lcd_default_contrast(void) +{ + /* TODO */ + return (0); +} + +void lcd_set_contrast(int val) +{ + /* TODO */ + (void) val; +} + +void lcd_set_invert_display(bool yesno) +{ + /* TODO */ + (void) yesno; +} + +/* turn the display upside down (call lcd_update() afterwards) */ +void lcd_set_flip(bool yesno) +{ + /* TODO */ + (void) yesno; +} + +/*** update functions ***/ + +void lcd_yuv_set_options(unsigned options) +{ + /* TODO */ + (void) options; +} + +/* Line write helper function for lcd_yuv_blit. Write two lines of yuv420. */ +extern void lcd_write_yuv420_lines(unsigned char const * const src[3], + int width, + int stride); +extern void lcd_write_yuv420_lines_odither(unsigned char const * const src[3], + int width, + int stride, + int x_screen, /* To align dither + pattern */ + int y_screen); +/* Performance function to blit a YUV bitmap directly to the LCD */ +void lcd_blit_yuv(unsigned char * const src[3], + int src_x, int src_y, int stride, + int x, int y, int width, int height) +{ + /* TODO */ + (void) src[3]; + (void) src_x; + (void) src_y; + (void) stride; + (void) x; + (void) y; + (void) width; + (void) height; +} + /* Update the display. - This must be called after all other LCD functions that change the display */ + This must be called after all other LCD functions that change + the display. */ void lcd_update(void) { + lcd_update_rect(0, 0, LCD_WIDTH, LCD_HEIGHT); +} +/* Update a fraction of the display. */ +void lcd_update_rect(int x, int y, int width, int height) +{ + const fb_data *addr; + + /* hack, because of errors on display driver */ + x = 0; y = 0; width = LCD_WIDTH; height = LCD_HEIGHT; + + if(width%2==1) + width+=1; + + /* We cannot see the first and last row and columns, + * so we are displaying from 1->130. + */ + + /* Limit the maximum width */ + if (x + width >= LCD_WIDTH) + width = LCD_WIDTH - x; + + /* Limit the maximum height */ + if (y + height >= LCD_HEIGHT) + height = LCD_HEIGHT - y; + + if ((width <= 0) || (height <= 0)) + return; /* Nothing left to do. */ + +#if defined(epson_controller) + /* Set the Row address */ + spi_lcd_write_command(PASET); + spi_lcd_write_data(x); + spi_lcd_write_data(x + width - 1); +#elif defined(phillips_controller) + spi_lcd_write_command(PASETP); + spi_lcd_write_data(x); + spi_lcd_write_data(x + width - 1); +#endif + +#if defined(epson_controller) + /* Set the Column address */ + spi_lcd_write_command(CASET); + spi_lcd_write_data(y); + spi_lcd_write_data(y + height - 1); +#elif defined(phillips_controller) + spi_lcd_write_command(CASETP); + spi_lcd_write_data(y); + spi_lcd_write_data(y + height -1); +#endif + + /* Write Memory */ +#if defined(epson_controller) + spi_lcd_write_command(RAMWR); +#elif defined(phillips_controller) + spi_lcd_write_command(RAMWRP); +#endif + + addr = &lcd_framebuffer[y][x]; + + do + { + int w = width/2, r0, r1, g0, g1, b0, b1; + + do + { + /* Make the conversion from 16 bit colour to 12 bit colour */ + r0 = (*addr & 0xf800) >> 12; + g0 = (*addr & 0x7e0) >> 7; + b0 = (*addr & 0x1f) >> 1; + addr++; + r1 = (*addr & 0xf800) >> 12; + g1 = (*addr & 0x7e0) >> 7; + b1 = (*addr & 0x1f) >> 1; + addr++; + + spi_lcd_write_data((r1 << 4) + g1); + spi_lcd_write_data((b1 << 4) + r0); + spi_lcd_write_data((g0 << 4) + b0); + + } while (--w > 0); + + addr += LCD_WIDTH - width; + } while (--height > 0); } Index: firmware/target/arm/at91sam/lyre_proto1/crt0.S =================================================================== --- firmware/target/arm/at91sam/lyre_proto1/crt0.S (revisão 20588) +++ firmware/target/arm/at91sam/lyre_proto1/crt0.S (cópia de trabalho) @@ -9,6 +9,9 @@ * * Copyright (C) 2009 by Jorge Pinto * + * This code had as reference the Atmel files of project named: + * "at91sam9260_getting_started_1.0". + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 Index: firmware/target/arm/at91sam/lyre_proto1/lcd-target.h =================================================================== --- firmware/target/arm/at91sam/lyre_proto1/lcd-target.h (revisão 20588) +++ firmware/target/arm/at91sam/lyre_proto1/lcd-target.h (cópia de trabalho) @@ -19,6 +19,70 @@ * ****************************************************************************/ -void lcd_update_rect(int x, int y, int width, int height); +#define epson_controller +//#define phillips_controller +/* + * EPSON Controller Definitions + */ +#define DISON 0xAF +#define DISOFF 0xAE +#define DISNOR 0xA6 +#define DISINV 0xA7 +#define SLPIN 0x95 +#define SLPOUT 0x94 +#define COMSCN 0xBB +#define DISCTL 0xCA +#define PASET 0x75 +#define CASET 0x15 +#define DATCTL 0xBC +#define RGBSET8 0xCE +#define RAMWR 0x5C +#define RAMRD 0x5D +#define PTLIN 0xA8 +#define PTLOUT 0xA9 +#define RMWIN 0xE0 +#define RMWOUT 0xEE +#define ASCSET 0xAA +#define SCSTART 0xAB +#define OSCON 0xD1 +#define OSCOFF 0xD2 +#define PWRCTR 0x20 +#define VOLCTR 0x81 +#define VOLUP 0xD6 +#define VOLDOWN 0xD7 +#define TMPGRD 0x82 +#define EPCTIN 0xCD +#define EPCOUT 0xCC +#define EPMWR 0xFC +#define EPMRD 0xFD +#define EPSRRD1 0x7C +#define EPSRRD2 0x7D +#define NOP 0x25 +/* + * PHILLIPS Controller Definitions + */ +#define NOPP 0x00 +#define BSTRON 0x03 +#define SLEEPIN 0x10 +#define SLEEPOUT 0x11 +#define NORON 0x13 +#define INVOFF 0x20 +#define INVON 0x21 +#define SETCON 0x25 +#define DISPOFF 0x28 +#define DISPON 0x29 +#define CASETP 0x2A +#define PASETP 0x2B +#define RAMWRP 0x2C +#define RGBSET 0x2D +#define MADCTL 0x36 +#define COLMOD 0x3A +#define DISCTR 0xB9 +#define EC 0xC0 + +extern void lcd_enable(bool state); +void lcd_init_device(void); +void lcd_update_rect(int x, int y, int width, int height); +void lcd_clear(void);