diff --git a/firmware/target/arm/system-arm.c b/firmware/target/arm/system-arm.c
index 60e57cf..03ac4ab 100644
--- a/firmware/target/arm/system-arm.c
+++ b/firmware/target/arm/system-arm.c
@@ -48,6 +48,41 @@ void __attribute__((noreturn)) UIE(unsigned int pc, unsigned int num)
     lcd_puts(0, 0, uiename[num]);
     lcd_putsf(0, 1, "at %08x" IF_COP(" (%d)"), pc
              IF_COP(, CURRENT_CORE));
+
+#if !defined(CPU_ARM7TDMI) /* no MPU/MMU */
+    if(num == 1 || num == 2) /* prefetch / data abort */
+    {
+        register unsigned status, address;
+
+        /* read FAR (fault address register) */
+        asm volatile( "mrc p15, 0, %0, c6, c0\n" : "=r"(address));
+        lcd_putsf(0, 3, "address 0x%8x", address);
+
+#if ARM_ARCH >= 6
+        /* ARMv6 has 2 different registers for prefetch & data aborts */
+        if(num == 1)
+            asm volatile( "mrc p15, 0, %0, c5, c0, 1\n" : "=r"(status));
+        else
+#endif
+            asm volatile( "mrc p15, 0, %0, c5, c0, 0\n" : "=r"(status));
+
+        lcd_putsf(0, 4, "FSR 0x%x", status);
+
+        unsigned int domain = (status >> 4) & 0xf;
+        unsigned int fault = status & 0xf;
+#if ARM_ARCH >= 6
+        fault |= (status & (1<<10)) >> 6; /* fault is 5 bits on armv6 */
+#endif
+        lcd_putsf(0, 5, "(domain %d, fault %d)", domain, fault);
+
+#if ARM_ARCH >= 6
+        if(num == 2)    /* data abort */
+            lcd_putsf(0, 6, (status & (1<<11)) ? "(write)" : "(read)");
+#endif
+    }
+#endif /* !defined(CPU_ARM7TDMI */
+
+
     lcd_update();
 
     disable_interrupt(IRQ_FIQ_STATUS);