This is the bug/patch tracker for Rockbox. Click here for more information.
Quick links: Bugs · Patches · Rockbox frontpage
FS#11106 - Add test & clean cache coherency functions to mmu-arm.S
Attached to Project:
Rockbox
Opened by Jack Halpin (FlynDice) - Monday, 15 March 2010, 05:47 GMT+2
Last edited by Rafaël Carré (funman) - Tuesday, 13 April 2010, 17:05 GMT+2
Opened by Jack Halpin (FlynDice) - Monday, 15 March 2010, 05:47 GMT+2
Last edited by Rafaël Carré (funman) - Tuesday, 13 April 2010, 17:05 GMT+2
|
DetailsThis patch adds some cache coherency functions to mmu-arm.S that only apply to the arm926ej-s core in the newer as3525v2 sansas. You can ask these cores to test the caches to see if they are dirty and use a loop to clean until there are no more dirty lines left in the cache. See page 2-23 of the ARM926EJ-S TRM for more info. There are versions of these functions present in the OF.
|
This task depends upon
Closed by Rafaël Carré (funman)
Tuesday, 13 April 2010, 17:05 GMT+2
Reason for closing: Accepted
Additional comments about closing: r25628
Tuesday, 13 April 2010, 17:05 GMT+2
Reason for closing: Accepted
Additional comments about closing: r25628
Are they related to the operations ARMv6 has?
(/me hasn't looked at mmu-armv6.S, not at the mentioned datasheet)
According to linux this works on all armv5tej
According to wikipedia all armv5 are TE, the J bit should have no influence
The ARM Architecture Reference Manual Issue I (v6) does, but they are marked as optional.
Perhaps we should add a capability defined for CPUs which support it (like arm926ejs)
Tested on Clipv1
The arm920/arm922 caches are 64-way and the arm926 cache is 4-way so the index format obviously can't work on arm926ej-s (it misses some cache sets)
Just needs testing on gigabeat F/X and/or mini2440
Use .rept gnu asm macro for indexed cleaning/invalidating