Index: firmware/target/arm/s5l8700/ipodnano2g/lcd-nano2g.c
===================================================================
--- firmware/target/arm/s5l8700/ipodnano2g/lcd-nano2g.c	(revision 27822)
+++ firmware/target/arm/s5l8700/ipodnano2g/lcd-nano2g.c	(working copy)
@@ -56,6 +56,7 @@
 #define R_COLUMN_ADDR_SET         0x2a
 #define R_ROW_ADDR_SET            0x2b
 #define R_MEMORY_WRITE            0x2c
+#define R_TE_CONTROL			  0x35
 
 
 /** globals **/
@@ -173,7 +174,8 @@
         /* Entry Mode: AM=0, I/D1=1, I/D0=1, ORG=0, HWM=1, BGR=1 */
         s5l_lcd_write_cmd_data(R_ENTRY_MODE, 0x1230); 
     } else {
-        /* TODO */
+        s5l_lcd_write_cmd(R_TE_CONTROL);
+		s5l_lcd_write_data(0);
     }
 }
 
@@ -215,7 +217,7 @@
         s5l_lcd_write_cmd(R_ROW_ADDR_SET);
         s5l_lcd_write_data(0);            /* Start row */
         s5l_lcd_write_data(LCD_HEIGHT-1); /* End row */
-
+		while (/*vsync && */!(PDAT10 & 1));
         s5l_lcd_write_cmd(R_MEMORY_WRITE);
     }
 
@@ -260,7 +262,7 @@
         s5l_lcd_write_cmd(R_ROW_ADDR_SET);
         s5l_lcd_write_data(y0);            /* Start row */
         s5l_lcd_write_data(y1);            /* End row */
-
+		while (/*vsync && */!(PDAT10 & 1));
         s5l_lcd_write_cmd(R_MEMORY_WRITE);
     }
 
@@ -343,7 +345,7 @@
         s5l_lcd_write_cmd(R_ROW_ADDR_SET);
         s5l_lcd_write_data(y0);            /* Start row */
         s5l_lcd_write_data(y1);            /* End row */
-
+		while (/*vsync && */!(PDAT10 & 1));
         s5l_lcd_write_cmd(R_MEMORY_WRITE);
     }