Rockbox

Tasklist

FS#11807 - Major speed up of iPod nano 2G LCD

Attached to Project: Rockbox
Opened by Andree Buschmann (Buschel) - Saturday, 11 December 2010, 13:12 GMT
Last edited by Andree Buschmann (Buschel) - Tuesday, 21 December 2010, 07:03 GMT
Task Type Patches
Category LCD
Status Closed
Assigned To Andree Buschmann (Buschel)
Operating System iPod Nano 2G
Severity Low
Priority Normal
Reported Version Release 3.7.1
Due in Version Undecided
Due Date Undecided
Percent Complete 100%
Votes 0
Private No

Details

This patch implements some changes to the iPod nano 2G LCD driver.

1) Do not poll FIFO full state, but for FIFO half full state. FIFO size is 16 bytes. So, when FIFO is not half full it is possible to write up 8 bytes (= 4 pixels) at once. This reduces the number of polls by far.
2) Force "width" to even in lcd_update_rect() to allow writing 2 pixels per loop.
3) Write 4 pixels per loop when (width==LCD_WIDTH).

Speed up is ~50% for RGB and 25% for YUV.

Edit: My nano has a LDS176 type LCD.
This task depends upon

Closed by  Andree Buschmann (Buschel)
Tuesday, 21 December 2010, 07:03 GMT
Reason for closing:  Accepted
Additional comments about closing:  All patches committed with up to r28868
Comment by Andree Buschmann (Buschel) - Saturday, 11 December 2010, 17:12 GMT
Small update which further speeds up the LCD driver.
Comment by Andree Buschmann (Buschel) - Saturday, 11 December 2010, 23:48 GMT
Further speed up for RGB 1/4, YUV 1/1 and YUV 1/4. This patch version changes the LCD register bus width to 16 bit (using little endian).
Comment by Andree Buschmann (Buschel) - Sunday, 12 December 2010, 00:21 GMT
Unify DATA8 / DATA18 and CMD8 / CMD16 functions.
Comment by Andree Buschmann (Buschel) - Sunday, 12 December 2010, 14:10 GMT
Introduce asm code for YUV blitting. The asm code was adapted from the iPod Video code. The usage of registers can be further optimized (e.g. not handing over LCD_BASE as parameter.

------------
svn
------------
192 MHz
Main: 86.5 (1/1) 343.5 (1/4)
YUV : 64.0 (1/1) 254.5 (1/4)

48 MHz
Main: 36.3 (1/1) 144.5 (1/4)
YUV : 22.5 (1/1) 90.0 (1/4)

------------
patch v08
------------
192 MHz
Main: 129.5 (1/1) 516.0 (1/4) = 6,017,088 bytes/s (+50%)
YUV : 123.5 (1/1) 499.0 (1/4) = 2,869,152 pixel/s (+93%)

48 MHz
Main: 64.5 (1/1) 258.0 (1/4) = 2,996,928 bytes/s (+78%)
YUV : 41.7 (1/1) 168.0 (1/4) = 968,774 pixel/s (+85%)
Comment by Andree Buschmann (Buschel) - Sunday, 12 December 2010, 15:36 GMT
v08 submitted with r28813. This task is kept open to track possible issues.
Comment by Andree Buschmann (Buschel) - Monday, 13 December 2010, 07:41 GMT
After some experiments during an IRC chat with TheSeven I also changed the LCD_PHTIME register for the LDS-type display to 0x00. This results in a massive speedup of RGB full/quarter updates. As we now come closer to the memory bandwith I have added an asm function to write a single line to the LCD. To do this efficient the starting index must be even and the number of transfered pixels must be a multiple of 4.

------------
patch v08 (against r28800)
------------

192 MHz
Main: 258.0 (1/1) 1029.5 (1/4) = 11,987,712 bytes/s (+198%)
YUV : 125.5 (1/1) 504.0 (1/4) = 2,915,616 pixel/s (+ 96%)

48 MHz
Main: 129.0 (1/1) 514.0 (1/4) = 5,993,856 bytes/s (+252%)
YUV : 41.7 (1/1) 168.0 (1/4) = 968,774 pixel/s (+ 85%)
Comment by Andree Buschmann (Buschel) - Monday, 13 December 2010, 20:04 GMT
Submitted with r28824 except setting LCD_PHTIME to 0x00. Patch v10 does this.
Comment by Andree Buschmann (Buschel) - Sunday, 19 December 2010, 21:30 GMT
Sync'ed against r28861 (tested for LDS and ILI type displays now). Speed is same for both LDS and ILI.

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