Index: firmware/target/arm/mmu-arm.h
===================================================================
--- firmware/target/arm/mmu-arm.h	(revision 20847)
+++ firmware/target/arm/mmu-arm.h	(working copy)
@@ -53,6 +53,12 @@
 /* will do writeback */
 void invalidate_idcache(void);
 
+/* Set bus speed relationships  */
+void mmu_bus_fast(void);
+void mmu_bus_sync(void);
+void mmu_bus_async(void);
+
+
 #define HAVE_CPUCACHE_INVALIDATE
 #define HAVE_CPUCACHE_FLUSH
 
Index: firmware/target/arm/mmu-arm.S
===================================================================
--- firmware/target/arm/mmu-arm.S	(revision 20847)
+++ firmware/target/arm/mmu-arm.S	(working copy)
@@ -483,5 +483,58 @@
     mov     pc, r1                  @
     .size   invalidate_idcache, .-invalidate_idcache
 
+/*
+ *void mmu_bus_fast(void)
+ *
+ */
+    .section   .text, "ax", %progbits
+    .align      2
+    .global     mmu_bus_fast
+    .type       mmu_bus_fast, %function
+
+mmu_bus_fast:
+      mrc     15, 0, r0, c1, c0, 0             @Read control reg
+      bic     r0, r0, #0xc0000000              @Set FastBus          fclk=pclk
+      mcr     15, 0, r0, c1, c0, 0             @Make it so
+      bx      lr
+
+    .size mmu_bus_fast, .-mmu_bus_fast
+
+/*
+ *void mmu_bus_sync(void)
+ *
+ */
+    .section   .text, "ax", %progbits
+    .align      2
+    .global     mmu_bus_sync
+    .type       mmu_bus_sync, %function
+
+mmu_bus_sync:
+    mrc     15, 0, r0, c1, c0, 0              @Read control reg
+    bic     r0, r0, #0xc0000000               @Clear Bus bits
+    orr     r0, r0, #0x40000000               @Set Sync Bus       fclk=(X)pclk
+    mcr     15, 0, r0, c1, c0, 0              @Make it so
+    bx      lr
+
+    .size mmu_bus_sync, .-mmu_bus_sync
+
+/*
+ *void mmu_bus_async(void)
+ *
+ */
+    .section   .text, "ax", %progbits
+    .align      2
+    .global     mmu_bus_async
+    .type       mmu_bus_async, %function
+
+mmu_bus_async:
+    mrc     15, 0, r0, c1, c0, 0             @Read control reg
+    orr     r0, r0, #0xc0000000              @Set async Bus    no dependencies
+    mcr     15, 0, r0, c1, c0, 0             @Make it so
+    bx      lr
+
+    .size mmu_bus_async, .-mmu_bus_async
+
+
 #endif /* !IMX31L */