--- bootloader/lyre_proto2.c Thu Jan 15 09:14:12 1970 +++ bootloader/lyre_proto2.c Thu Jan 15 09:14:12 1970 @@ -0,0 +1,83 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * + * Copyright (C) 2009 by Bob Cousins, Lyre Project + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +/* Include Standard files */ +#include +#include +#include "inttypes.h" +#include "string.h" +#include "cpu.h" +#include "system.h" +#include "kernel.h" + +/* Show the Rockbox logo - in show_logo.c */ +extern int show_logo(void); + +#define LED1_CON_MASK (3 << 10) /* mask */ +#define LED1_CON (1 << 10) /* GPIO, output */ + +#define LED_NONE 0x0000 +#define LED1 0x0020 /* bit 5 */ +#define LED2 0x0040 /* bit 5 */ +#define LED3 0x0080 /* bit 5 */ +#define LED4 0x0100 /* bit 5 */ +#define LED_ALL (LED1|LED2|LED3|LED4) + +void set_leds (int led_mask) +{ + GPBDAT &= ~led_mask; +} + +void clear_leds (int led_mask) +{ + GPBDAT |= led_mask; +} + +/* Never returns */ +void led_flash (int led_mask1, int led_mask2) +{ + /* set port direction */ + GPBCON &= ~LED1_CON_MASK | LED1_CON; + GPBUP |= LED1; /* disable pullup */ + + while (1) + { + set_leds (led_mask1); + sleep(HZ/2); + clear_leds (led_mask1); + + set_leds(led_mask2); + sleep(HZ/2); + clear_leds (led_mask2); + } +} + +int main(void) +{ + + kernel_init(); + lcd_init(); + + show_logo(); + + led_flash(LED_ALL, LED_NONE); + while (1); +} --- bootloader/SOURCES Thu Jan 15 09:14:12 1970 +++ bootloader/SOURCES Thu Jan 15 09:14:12 1970 @@ -55,6 +55,9 @@ #elif defined(LYRE_PROTO1) lyre_proto1.c show_logo.c +#elif defined(LYRE_PROTO2) +lyre_proto2.c +show_logo.c #elif defined(IPOD_NANO2G) ipodnano2g.c show_logo.c --- firmware/SOURCES Thu Jan 15 09:14:12 1970 +++ firmware/SOURCES Thu Jan 15 09:14:12 1970 @@ -1365,6 +1365,18 @@ #endif #endif /* SIMULATOR */ +#if defined(LYRE_PROTO2) +#ifndef SIMULATOR +target/arm/lcd-as-memframe.S +target/arm/mmu-arm.S +target/arm/s3c2440/lyre_proto2/kernel-lyre_proto2.c +target/arm/s3c2440/lyre_proto2/lcd-lyre_proto2.c +target/arm/s3c2440/lyre_proto2/system-lyre_proto2.c +#ifndef BOOTLOADER +#endif +#endif /* SIMULATOR */ +#endif /* LYRE_PROTO2 */ + #ifdef SAMSUNG_YH820 #ifndef SIMULATOR target/arm/ata-as-arm.S --- firmware/export/config-lyre_proto2.h Thu Jan 15 09:14:12 1970 +++ firmware/export/config-lyre_proto2.h Thu Jan 15 09:14:12 1970 @@ -0,0 +1,140 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * + * + * Copyright (C) 2009 by Jorge Pinto, Lyre Project + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +/* + * This config file is for the Lyre prototype 2. + */ +#define TARGET_TREE /* this target is using the target tree system */ + +/* TODO: ??? */ +#define CONFIG_SDRAM_START 0x20000000 + +/* For Rolo and boot loader */ +#define MODEL_NUMBER 131 +#define MODEL_NAME "Lyre Proto2" + +#define HAVE_FLASH_STORAGE +/* define the storage type */ +#define CONFIG_STORAGE STORAGE_SD + +/* define this if you have a bitmap LCD display */ +#define HAVE_LCD_BITMAP + +/* define this if you have a colour LCD */ +#define HAVE_LCD_COLOR + +#define CONFIG_LCD LCD_LYRE_PROTO2 + +/* LCD dimensions */ +#define LCD_WIDTH 240 +#define LCD_HEIGHT 320 +/* The LCD used is rgb888. We do a bit conversion in LCD driver. */ +#define LCD_DEPTH 16 /* 65536 colours */ +#define LCD_PIXELFORMAT RGB565 /* rgb565 */ + +#define HAVE_ALBUMART + +/* define this to enable bitmap scaling */ +#define HAVE_BMP_SCALING + +/* define this to enable JPEG decoding */ +#define HAVE_JPEG + +/* RMC TODO: what is this for?? */ +/* define this if you have access to the pitchscreen */ +#define HAVE_PITCHSCREEN + +#define CONFIG_KEYPAD LYRE_PROTO2_PAD + +/* Define this if you do software codec */ +#define CONFIG_CODEC SWCODEC + +/* define this if you have a disk storage, i.e. something + that needs spinups and can cause skips when shaked */ +/* #define HAVE_DISK_STORAGE */ + +/* Define this for LCD backlight available */ +/* RMC: With Toppoly 3.5" LCD touch screen */ +#define HAVE_BACKLIGHT +#define HAVE_BACKLIGHT_BRIGHTNESS + +/* The number of bytes reserved for loadable codecs */ +#define CODEC_SIZE 0x100000 + +/* The number of bytes reserved for loadable plugins */ +#define PLUGIN_BUFFER_SIZE 0x100000 + +/* Lyre prototype 1 do not use I2C, just SPI */ +#define CONFIG_I2C I2C_NONE + +/* Define this if you have the TLV320 audio codec -> controlled by the DSP */ +#define HAVE_TLV320 + +/* TLV320 has no tone controls, so we use the software ones */ +#define HAVE_SW_TONE_CONTROLS + +#define BATTERY_CAPACITY_DEFAULT 1100 /* default battery capacity */ +#define BATTERY_CAPACITY_MIN 500 /* min. capacity selectable */ +#define BATTERY_CAPACITY_MAX 2500 /* max. capacity selectable */ +#define BATTERY_CAPACITY_INC 100 /* capacity increment */ +#define BATTERY_TYPES_COUNT 1 /* only one type */ + +/* TODO:#define HAVE_USBSTACK */ + +/***************************************************************************/ +#ifndef SIMULATOR + +#define CONFIG_CPU S3C2440 + +/* Main LCD backlight brightness range and defaults */ +#define MIN_BRIGHTNESS_SETTING 1 /* 0.5 mA */ +#define MAX_BRIGHTNESS_SETTING 12 /* 32 mA */ +#define DEFAULT_BRIGHTNESS_SETTING 10 /* 16 mA */ + +/* Hardware controlled charging with monitoring */ +#define CONFIG_CHARGING CHARGING_MONITOR + +#define POWER_INPUT_BATTERY 0 + +/* Define this if your LCD can set contrast */ +#define HAVE_LCD_CONTRAST + +#define MIN_CONTRAST_SETTING 0 +#define MAX_CONTRAST_SETTING 63 +#define DEFAULT_CONTRAST_SETTING 47 /* Match boot contrast */ + +/* Define this to the CPU frequency */ +#define CPU_FREQ 405000000 +#define MCK_FREQ (CPU_FREQ/4) +#define SLOW_CLOCK 32768 + +/* Offset ( in the firmware file's header ) to the file CRC */ +#define FIRMWARE_OFFSET_FILE_CRC 0 + +/* Offset ( in the firmware file's header ) to the real data */ +#define FIRMWARE_OFFSET_FILE_DATA 8 + +#define BOOTFILE_EXT "lyre_proto2" +#define BOOTFILE "rockbox." BOOTFILE_EXT +#define BOOTDIR "/.rockbox" + +#endif +/***************************************************************************/ --- firmware/export/config.h Thu Jan 15 09:14:12 1970 +++ firmware/export/config.h Thu Jan 15 09:14:12 1970 @@ -114,6 +114,7 @@ #define SAMSUNG_YH_PAD 38 #define ONDAVX777_PAD 39 #define SAMSUNG_YPS3_PAD 40 +#define LYRE_PROTO2_PAD 41 /* CONFIG_REMOTE_KEYPAD */ #define H100_REMOTE 1 @@ -194,10 +195,11 @@ #define LCD_ONDAVX767 30 /* as used by the Onda VX767 */ #define LCD_SSD1303 31 /* as used by the Sansa Clip */ #define LCD_FUZE 32 /* as used by the Sansa Fuze */ -#define LCD_LYRE_PROTO1 33 /* as used by the Lyre */ +#define LCD_LYRE_PROTO1 33 /* as used by the Lyre prototype 1 */ #define LCD_YH925 34 /* as used by Samsung YH-925 (similar to the H10 20GB) */ -#define LCD_VIEW 35 /* as used by the Sansa View */ +#define LCD_VIEW 35 /* as used by the Sansa View */ #define LCD_NANO2G 36 /* as used by the iPod Nano 2nd Generation */ +#define LCD_LYRE_PROTO2 99 /* as used by the Lyre prototype 2 */ /* LCD_PIXELFORMAT */ #define HORIZONTAL_PACKING 1 @@ -218,7 +220,7 @@ /* CONFIG_I2C */ #define I2C_NONE 0 /* For targets that do not use I2C - as the -Lyre prototype 1*/ +Lyre prototype 1 and 2*/ #define I2C_PLAYREC 1 /* Archos Player/Recorder style */ #define I2C_ONDIO 2 /* Ondio style */ #define I2C_COLDFIRE 3 /* Coldfire style */ @@ -386,6 +388,8 @@ #include "config-view.h" #elif defined(LYRE_PROTO1) #include "config-lyre_proto1.h" +#elif defined(LYRE_PROTO2) +#include "config-lyre_proto2.h" #elif defined(SAMSUNG_YH820) #include "config-yh820.h" #elif defined(SAMSUNG_YH920) --- firmware/target/arm/s3c2440/crt0.S Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/crt0.S Thu Jan 15 09:14:12 1970 @@ -8,6 +8,7 @@ * $Id: crt0.S 20769 2009-04-21 04:39:17Z kkurbjun $ * * Copyright (C) 2008 by Karl Kurbjun + * Copyright (C) 2009 by Bob Cousins * * Arm bootloader and startup code based on startup.s from the iPodLinux * loader @@ -26,6 +27,145 @@ #include "config.h" #include "cpu.h" +/****************************************************************************/ +#ifdef GIGABEAT_F + +/* Clock and Power Management setup values */ +#define VAL_CLKDIV 0x7 +#define VAL_UPLLCON 0x0003C042 +#define VAL_MPLLCON 0x000C9042 + +/* Memory Controller setup */ + /* Memory setup (taken from 0x5070) */ + /* BWSCON + * Reserved 0 + * Bank 0: + * Bus width 01 (16 bit) + * Bank 1: + * Buswidth 00 (8 bit) + * Disable wait 0 + * Not using UB/LB 0 + * Bank 2: + * Buswidth 10 (32 bit) + * Disable wait 0 + * Not using UB/LB 0 + * Bank 3: + * Buswidth 10 (32 bit) + * Disable wait 0 + * Use UB/LB 1 + * Bank 4: + * Buswidth 10 (32 bit) + * Disable wait 0 + * Use UB/LB 1 + * Bank 5: + * Buswidth 00 (8 bit) + * Disable wait 0 + * Not using UB/LB 0 + * Bank 6: + * Buswidth 10 (32 bit) + * Disable wait 0 + * Not using UB/LB 0 + * Bank 7: + * Buswidth 00 (8 bit) + * Disable wait 0 + * Not using UB/LB 0 + */ +#define VAL_BWSCON 0x01055102 + /* BANKCON0 + * Pagemode: normal (1 data) 00 + * Pagemode access cycle: 2 clocks 00 + * Address hold: 2 clocks 10 + * Chip selection hold time: 1 clock 10 + * Access cycle: 8 clocks 101 + * Chip select setup time: 1 clock 01 + * Address setup time: 0 clock 00 + */ +#define VAL_BANKCON0 0x00000D60 + /* BANKCON1 + * Pagemode: normal (1 data) 00 + * Pagemode access cycle: 2 clocks 00 + * Address hold: 0 clocks 00 + * Chip selection hold time: 0 clock 00 + * Access cycle: 1 clocks 000 + * Chip select setup time: 0 clocks 00 + * Address setup time: 0 clocks 00 + */ +#define VAL_BANKCON1 0x00000000 + /* BANKCON2 + * Pagemode: normal (1 data) 00 + * Pagemode access cycle: 2 clocks 00 + * Address hold: 2 clocks 10 + * Chip selection hold time: 2 clocks 10 + * Access cycle: 14 clocks 111 + * Chip select setup time: 4 clocks 11 + * Address setup time: 0 clocks 00 + */ +#define VAL_BANKCON2 0x00001FA0 +#define VAL_BANKCON3 0x00001D80 +#define VAL_BANKCON4 0x00001D80 +#define VAL_BANKCON5 0x00000000 + /* BANKCON6/7 + * SCAN: 9 bit 01 + * Trcd: 3 clocks 01 + * Tcah: 0 clock 00 + * Tcoh: 0 clock 00 + * Tacc: 1 clock 000 + * Tcos: 0 clock 00 + * Tacs: 0 clock 00 + * MT: Sync DRAM 11 + */ +#define VAL_BANKCON6 0x00018005 +#define VAL_BANKCON7 0x00018005 + +#define VAL_REFRESH 0x00980501 + /* BANKSIZE + * BK76MAP: 32M/32M 000 + * Reserved: 0 0 (was 1) + * SCLK_EN: always 1 (was 0) + * SCKE_EN: disable 0 + * Reserved: 0 0 + * BURST_EN: enabled 1 + */ +#define VAL_BANKSIZE 0x00000090 +#define VAL_MRSRB6 0x00000030 +#define VAL_MRSRB7 0x00000030 +#define VAL_GPACON 0x00FFFFFF + +/****************************************************************************/ +#elif defined (LYRE_PROTO2) + +/* For Mini2440 board or compatible */ +/* Clock and Power Management setup values */ +#define VAL_CLKDIV 0x5 /* HCLK = FCLK/4, PCLK = HCLK/2 */ +#define VAL_UPLLCON 0x00038022 /* UCLK = 48 MHz */ +#define VAL_MPLLCON 0x0007F021 /* FCLK = 405 MHz */ + +#define FCLK 405000000 +#define HCLK (FCLK/4) /* = 101,250,000 */ +#define PCLK (HCLK/2) /* = 50,625,000 */ + +/* Memory Controller setup */ +#define VAL_BWSCON 0x22111112 +#define VAL_BANKCON0 0x00002F50 +#define VAL_BANKCON1 0x00000700 +#define VAL_BANKCON2 0x00000700 +#define VAL_BANKCON3 0x00000700 +#define VAL_BANKCON4 0x00000700 +#define VAL_BANKCON5 0x0007FFFC +#define VAL_BANKCON6 0x00018009 +#define VAL_BANKCON7 0x00018009 + +#define VAL_REFRESH 0x008E04EB +#define VAL_BANKSIZE 0x000000B2 +#define VAL_MRSRB6 0x00000030 +#define VAL_MRSRB7 0x00000030 + +#define VAL_GPACON 0x00FFFFFF +#define VAL_GPFCON 0x000055AA + +#endif +/****************************************************************************/ + /* Exception Handlers */ .section .vectors,"ax",%progbits .code 32 @@ -73,6 +213,7 @@ .ltorg .size word_copy, .-word_copy + /* * Entry: start * Variables: @@ -85,6 +226,29 @@ .global start start: +#ifdef LYRE_PROTO2 +/* Initialise LEDs for quick/dirty diagnostics */ +/* LEDs are active low */ +#define LED1 0xFFDF /* bit 5 */ +#define LED2 0xFFBF /* bit 6 */ +#define LED3 0xFF7F /* bit 7 */ +#define LED4 0xFEFF /* bit 8 */ + + /* set GPB ports 5-8 to output */ + ldr r1, =0x56000010 + mov r2, #0x00015400 + str r2, [r1] + + /* disable pullups GPB ports 5-8 */ + mov r2, #0x000001E0 + str r2, [r1, #8] + + /* the following code sets one LED, use LED1 to LED4 as required */ + ldr r1, =0x56000014 + ldr r2, =LED1 + str r2, [r1] +#endif + /* Get the execute address; R0 is used to store the address and it should * not be written to till the rest of the execution checks are done below. * This is done first thing since we have to check if the code was started @@ -95,6 +259,7 @@ /************************** DO NOT WRITE TO R0 ***************************/ +#ifdef GIGABEAT_F /* Check if the code is running from flash. If not skip all these checks */ cmp r0, #0xA0000 bne poweron @@ -105,7 +270,6 @@ str r1, [r2, #0x14] /* Did an RTC event wake the player up? */ - mov r2, #0x4A000000 ldr r1, [r2] ands r1, r1, #0x40000000 @@ -147,6 +311,7 @@ bootOF: /* power is not down || menu is held || the charger is not connected */ mov pc, #0x70 +#endif poweron: /* enter supervisor mode, disable IRQ */ @@ -166,6 +331,7 @@ ldr r2, =0x00003FFF str r2, [r1, #0x1C] +#ifdef GIGABEAT_F /* Check if loaded by the old bootloader or by the OF. This copy routine * cannot run/copy properly until the memory has been initialized, so the * copy routine later is still necessary. The old bootloader/OF will @@ -198,6 +364,7 @@ bl word_copy mov pc, #0x31000000 +#endif skipreset: @@ -209,7 +376,7 @@ orr r0, r0, r1 mcr p15, 0, r0, c1, c0, 0 - mov r2, #0x7 + mov r2, #VAL_CLKDIV mov r1, #0x4C000000 str r2, [r1, #0x14] @@ -219,7 +386,7 @@ ldr r2, =0xFFFFFFFF str r2, [r1] - ldr r2, =0x0003C042 + ldr r2, =VAL_UPLLCON str r2, [r1, #0x08] nop @@ -231,7 +398,7 @@ nop nop - ldr r2, =0x000C9042 + ldr r2, =VAL_MPLLCON str r2, [r1, #0x04] nop @@ -248,128 +415,55 @@ mov r1, #0x56000000 str r2, [r1, #0x80] - /* Memory setup (taken from 0x5070) */ + /* Memory setup */ - /* BWSCON - * Reserved 0 - * Bank 0: - * Bus width 01 (16 bit) - * Bank 1: - * Buswidth 00 (8 bit) - * Disable wait 0 - * Not using UB/LB 0 - * Bank 2: - * Buswidth 10 (32 bit) - * Disable wait 0 - * Not using UB/LB 0 - * Bank 3: - * Buswidth 10 (32 bit) - * Disable wait 0 - * Use UB/LB 1 - * Bank 4: - * Buswidth 10 (32 bit) - * Disable wait 0 - * Use UB/LB 1 - * Bank 5: - * Buswidth 00 (8 bit) - * Disable wait 0 - * Not using UB/LB 0 - * Bank 6: - * Buswidth 10 (32 bit) - * Disable wait 0 - * Not using UB/LB 0 - * Bank 7: - * Buswidth 00 (8 bit) - * Disable wait 0 - * Not using UB/LB 0 - */ - ldr r2, =0x01055102 + ldr r2, =VAL_BWSCON mov r1, #0x48000000 str r2, [r1] - /* BANKCON0 - * Pagemode: normal (1 data) 00 - * Pagemode access cycle: 2 clocks 00 - * Address hold: 2 clocks 10 - * Chip selection hold time: 1 clock 10 - * Access cycle: 8 clocks 101 - * Chip select setup time: 1 clock 01 - * Address setup time: 0 clock 00 - */ - ldr r2, =0x00000D60 + /* BANKCON0 */ + ldr r2, =VAL_BANKCON0 str r2, [r1, #0x04] - - /* BANKCON1 - * Pagemode: normal (1 data) 00 - * Pagemode access cycle: 2 clocks 00 - * Address hold: 0 clocks 00 - * Chip selection hold time: 0 clock 00 - * Access cycle: 1 clocks 000 - * Chip select setup time: 0 clocks 00 - * Address setup time: 0 clocks 00 - */ - ldr r2, =0x00000000 + /* BANKCON1 */ + ldr r2, =VAL_BANKCON1 str r2, [r1, #0x08] - /* BANKCON2 - * Pagemode: normal (1 data) 00 - * Pagemode access cycle: 2 clocks 00 - * Address hold: 2 clocks 10 - * Chip selection hold time: 2 clocks 10 - * Access cycle: 14 clocks 111 - * Chip select setup time: 4 clocks 11 - * Address setup time: 0 clocks 00 - */ - ldr r2, =0x00001FA0 + /* BANKCON2 */ + ldr r2, =VAL_BANKCON2 str r2, [r1, #0xC] /* BANKCON3 */ - ldr r2, =0x00001D80 + ldr r2, =VAL_BANKCON3 str r2, [r1, #0x10] /* BANKCON4 */ str r2, [r1, #0x14] /* BANKCON5 */ - ldr r2, =0x00000000 + ldr r2, =VAL_BANKCON5 str r2, [r1, #0x18] - /* BANKCON6/7 - * SCAN: 9 bit 01 - * Trcd: 3 clocks 01 - * Tcah: 0 clock 00 - * Tcoh: 0 clock 00 - * Tacc: 1 clock 000 - * Tcos: 0 clock 00 - * Tacs: 0 clock 00 - * MT: Sync DRAM 11 - */ - ldr r2, =0x00018005 + /* BANKCON6/7 */ + ldr r2, =VAL_BANKCON6 str r2, [r1, #0x1C] /* BANKCON7 */ str r2, [r1, #0x20] /* REFRESH */ - ldr r2, =0x00980501 + ldr r2, =VAL_REFRESH str r2, [r1, #0x24] - /* BANKSIZE - * BK76MAP: 32M/32M 000 - * Reserved: 0 0 (was 1) - * SCLK_EN: always 1 (was 0) - * SCKE_EN: disable 0 - * Reserved: 0 0 - * BURST_EN: enabled 1 - */ - ldr r2, =0x00000090 + /* BANKSIZE */ + ldr r2, =VAL_BANKSIZE str r2, [r1, #0x28] /* MRSRB6 */ - ldr r2, =0x00000030 + ldr r2, =VAL_MRSRB6 str r2, [r1, #0x2C] /* MRSRB7 */ str r2, [r1, #0x30] + /* RMC: I guess this is some notes about Gigabeat */ /* 0x56000000 0x1FFFCFF 4 0x1FFFEFF @@ -379,25 +473,24 @@ /* GPACON */ mov r1, #0x56000000 - ldr r2, =0x00FFFFFF + ldr r2, =VAL_GPACON str r2, [r1] - /* The builds have two potential load addresses, one being from flash, + /* Copy from current location (NOR Flash?) to RAM */ + + /* Gigabeat: The builds have two potential load addresses, one being from flash, * and the other from some "unknown" location right now the assumption * is that the code is not at 0x3000000. */ /* get the high part of our execute address (where am I) */ ldr r0, =0xfffff000 - and r0, pc, r0 + and r0, pc, r0 /* copy from address */ - /* Copy code to 0x30000000 */ + /* SDRAM starts at 0x30000000 (physical address) */ + ldr r1, =0x30000000 /* copy To address */ ldr r2, = _vectorstart ldr r3, = _initdata_end - sub r2, r3, r2 /* length of loader */ - - ldr r1, =0x30000000 /* copy location */ - bl word_copy ldr r1, =donecopy @@ -410,8 +503,8 @@ /* Setup the MMU, start by disabling */ mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x41 /* disable mmu and dcache */ - bic r0, r0, #0x1000 /* disable icache */ + bic r0, r0, #0x41 /* disable mmu and dcache */ + bic r0, r0, #0x1000 /* disable icache */ mcr p15, 0, r0, c1, c0, 0 bl ttb_init @@ -515,6 +608,7 @@ UIE: b UIE +/* TODO: Review this function - is it target dependent? */ /* * Function: rom_shutdown * Variables: --- firmware/target/arm/s3c2440/lyre_proto2/adc-target.h Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/adc-target.h Thu Jan 15 09:14:12 1970 @@ -0,0 +1,39 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: adc-target.h 17847 2008-06-28 18:10:04Z bagder $ + * + * Copyright (C) 2006 by Barry Wardell + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef _ADC_TARGET_H_ +#define _ADC_TARGET_H_ + +/* only two channels used by the Gigabeat */ +#define NUM_ADC_CHANNELS 2 + +#define ADC_BATTERY 0 +#define ADC_HPREMOTE 1 +#define ADC_UNKNOWN_3 2 +#define ADC_UNKNOWN_4 3 +#define ADC_UNKNOWN_5 4 +#define ADC_UNKNOWN_6 5 +#define ADC_UNKNOWN_7 6 +#define ADC_UNKNOWN_8 7 + +#define ADC_UNREG_POWER ADC_BATTERY /* For compatibility */ +#define ADC_READ_ERROR 0xFFFF + +#endif --- firmware/target/arm/s3c2440/lyre_proto2/backlight-target.h Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/backlight-target.h Thu Jan 15 09:14:12 1970 @@ -0,0 +1,54 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: backlight-target.h 17847 2008-06-28 18:10:04Z bagder $ + * + * Copyright (C) 2006 by Linus Nielsen Feltzing + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef BACKLIGHT_TARGET_H +#define BACKLIGHT_TARGET_H + +/* Use these to set the buttonlight mode */ +enum buttonlight_mode +{ + /* ON follows the setting */ + BUTTONLIGHT_ON, + + /* buttonlights always off */ + BUTTONLIGHT_OFF, + + /* buttonlights follow backlight */ + BUTTONLIGHT_FOLLOW +}; + +/* Call this to flicker or signal the button lights. Only is effective for + * modes that take a trigger input. + */ +void __buttonlight_trigger(void); + +/* map the mode from the command into the state machine entries */ +/* See enum buttonlight_mode for available functions */ +void __buttonlight_mode(enum buttonlight_mode mode); + +bool _backlight_init(void); +void _backlight_on(void); +void _backlight_off(void); +void _backlight_set_brightness(int brightness); + +void _buttonlight_set_brightness(int brightness); +void _buttonlight_on(void); +void _buttonlight_off(void); +#endif --- firmware/target/arm/s3c2440/lyre_proto2/button-target.h Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/button-target.h Thu Jan 15 09:14:12 1970 @@ -0,0 +1,100 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: button-target.h 17847 2008-06-28 18:10:04Z bagder $ + * + * Copyright (C) 2006 by Linus Nielsen Feltzing + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef _BUTTON_TARGET_H_ +#define _BUTTON_TARGET_H_ + +#include +#include "config.h" + +#define HAS_BUTTON_HOLD + +bool button_hold(void); +void button_init_device(void); +int button_read_device(void); +void touchpad_set_sensitivity(int level); + +/* Toshiba Gigabeat specific button codes */ + +#define BUTTON_POWER 0x00000001 +#define BUTTON_MENU 0x00000002 +#define BUTTON_VOL_UP 0x00000004 +#define BUTTON_VOL_DOWN 0x00000008 +#define BUTTON_A 0x00000010 + +#define BUTTON_LEFT 0x00000020 +#define BUTTON_RIGHT 0x00000040 +#define BUTTON_UP 0x00000080 +#define BUTTON_DOWN 0x00000100 + +#define BUTTON_SELECT 0x00000200 + +/* Remote control buttons */ + +#define BUTTON_RC_VOL_UP 0x00000400 +#define BUTTON_RC_VOL_DOWN 0x00000800 +#define BUTTON_RC_FF 0x00001000 +#define BUTTON_RC_REW 0x00002000 + +#define BUTTON_RC_PLAY 0x00004000 +#define BUTTON_RC_DSP 0x00008000 + +/* Toshiba Gigabeat specific remote button ADC values */ +/* The remote control uses ADC 1 to emulate button pushes + Reading (approx) Button HP plugged in? Remote plugged in? + 0 N/A Yes No + 125 Play/Pause Cant tell Yes + 241 Speaker+ Cant tell Yes + 369 Rewind Cant tell Yes + 492 Fast Fwd Cant tell Yes + 616 Vol + Cant tell Yes + 742 Vol - Cant tell Yes + 864 None Cant tell Yes + 1023 N/A No No +*/ + +/* + Notes: + + Buttons on the remote are translated into equivalent button presses just + as if you were pressing them on the Gigabeat itself. + + We cannot tell if the hold is asserted on the remote. The Hold function on + the remote is to block the output of the buttons changing. + + Only one button can be sensed at a time. If another is pressed, the button + with the lowest reading is dominant. So, if Rewind and Vol + are pressed + at the same time, Rewind value is the one that is read. +*/ + + + + +#define BUTTON_MAIN (BUTTON_POWER|BUTTON_MENU|BUTTON_LEFT|BUTTON_RIGHT\ + |BUTTON_UP|BUTTON_DOWN|BUTTON_VOL_UP|BUTTON_VOL_DOWN\ + |BUTTON_SELECT|BUTTON_A) + +#define BUTTON_REMOTE (BUTTON_RC_VOL_UP|BUTTON_RC_VOL_DOWN|BUTTON_RC_FF\ + |BUTTON_RC_REW|BUTTON_RC_PLAY|BUTTON_RC_DSP) + +#define POWEROFF_BUTTON BUTTON_POWER +#define POWEROFF_COUNT 10 + +#endif /* _BUTTON_TARGET_H_ */ --- firmware/target/arm/s3c2440/lyre_proto2/kernel-lyre_proto2.c Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/kernel-lyre_proto2.c Thu Jan 15 09:14:12 1970 @@ -0,0 +1,79 @@ +/*************************************************************************** +* __________ __ ___. +* Open \______ \ ____ ____ | | _\_ |__ _______ ___ +* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / +* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < +* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ +* \/ \/ \/ \/ \/ +* $Id: kernel-meg-fx.c 19368 2008-12-08 23:31:05Z jethead71 $ +* +* Copyright (C) 2007 by Michael Sevakis +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License +* as published by the Free Software Foundation; either version 2 +* of the License, or (at your option) any later version. +* +* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY +* KIND, either express or implied. +* +****************************************************************************/ +#include "config.h" +#include "system.h" +#include "kernel.h" +#include "timer.h" +#include "thread.h" + +void tick_start(unsigned int interval_in_ms) +{ + /* + * Based on default PCLK of 49.1568MHz - scaling chosen to give + * remainder-free result for tick interval of 10ms (100Hz) + * Timer input clock frequency = + * fPCLK / {prescaler value+1} / {divider value} + * TIMER_FREQ = 49156800 / 2 + * 146300 = TIMER_FREQ / 21 / 8 + * 49156800 = 19*11*(7)*7*5*5*(3)*2*2*2*2*2*2 + * 21 = 7*3 + */ + + /* stop timer 4 */ + TCON &= ~(1 << 20); + /* Set the count for timer 4 */ + TCNTB4 = (TIMER_FREQ / TIMER234_PRESCALE / 8) * interval_in_ms / 1000; + /* Set the the prescaler value for timers 2,3, and 4 */ + TCFG0 = (TCFG0 & ~0xff00) | ((TIMER234_PRESCALE-1) << 8); + /* DMA mode off, MUX4 = 1/16 */ + TCFG1 = (TCFG1 & ~0xff0000) | 0x030000; + /* set manual bit */ + TCON |= 1 << 21; + /* reset manual bit */ + TCON &= ~(1 << 21); + + /* interval mode */ + TCON |= 1 << 22; + /* start timer 4 */ + TCON |= (1 << 20); + + /* timer 4 unmask interrupts */ + INTMSK &= ~TIMER4_MASK; +} + +#ifdef BOOTLOADER +void tick_stop(void) +{ + s3c_regset32(&INTMSK, TIMER4_MASK); + TCON &= ~(1 << 20); + SRCPND = TIMER4_MASK; + INTPND = TIMER4_MASK; +} +#endif + +void TIMER4(void) +{ + /* Run through the list of tick tasks */ + call_tick_tasks(); + + SRCPND = TIMER4_MASK; + INTPND = TIMER4_MASK; +} --- firmware/target/arm/s3c2440/lyre_proto2/lcd-lyre_proto2.c Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/lcd-lyre_proto2.c Thu Jan 15 09:14:12 1970 @@ -0,0 +1,570 @@ +/*************************************************************************** +* __________ __ ___. +* Open \______ \ ____ ____ | | _\_ |__ _______ ___ +* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / +* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < +* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ +* \/ \/ \/ \/ \/ +* $Id: lcd-meg-fx.c 22432 2009-08-19 22:15:45Z nls $ +* +* Copyright (C) 2009 by Lyre Project +* Copyright (C) 2007 by Greg White +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License +* as published by the Free Software Foundation; either version 2 +* of the License, or (at your option) any later version. +* +* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY +* KIND, either express or implied. +* +****************************************************************************/ +#include + +#include "config.h" +#include "system.h" +#include "cpu.h" +#include "string.h" +#include "lcd.h" +#include "kernel.h" +#include "lcd-target.h" + +#define LCDADDR(x, y) (&lcd_framebuffer[(y)][(x)]) + +static bool lcd_on = true; +#if defined(HAVE_LCD_ENABLE) || defined(HAVE_LCD_SLEEP) +static bool lcd_powered = true; +#endif +static unsigned lcd_yuv_options = 0; +/* +** This is imported from lcd-16bit.c +*/ +extern struct viewport* current_vp; + +/* Copies a rectangle from one framebuffer to another. Can be used in + single transfer mode with width = num pixels, and height = 1 which + allows a full-width rectangle to be copied more efficiently. */ +extern void lcd_copy_buffer_rect(fb_data *dst, const fb_data *src, + int width, int height); + +#if defined(HAVE_LCD_ENABLE) || defined(HAVE_LCD_SLEEP) +bool lcd_active(void) +{ + return lcd_on; +} +#endif + +static unsigned int LCDBANK(unsigned int address) +{ + return ((address >> 22) & 0xff); +} + +static unsigned int LCDBASEU(unsigned int address) +{ + return (address & ((1 << 22)-1)) >> 1; +} + +static unsigned int LCDBASEL(unsigned int address) +{ + address += 320*240*2; + return (address & ((1 << 22)-1)) >> 1; +} + +static inline void delay_cycles(volatile int delay) +{ + while(delay>0) delay--; +} + +static void LCD_CTRL_setup(void) +{ + /* ENVID = 0, BPPMODE = 16 bpp, PNRMODE = TFT, MMODE = Each Frame, CLKVAL = 8 */ + LCDCON1 = 0x878; + +#ifdef GIGABEAT + /* VCPW = 1, VFPD = 5, LINEVAL = 319, VBPD = 7 */ + LCDCON2 = 0x74FC141; + + /* HFPD = 9, HOZVAL = 239, HBPD = 7 */ + LCDCON3 = 0x38EF09; + + /* HSPW = 7 */ + LCDCON4 = 7; +#elif LYRE_PROTO2 + /* Values taken from test code for Mini2440, 3.5" TFT LCD Touchscreen */ + LCDCON2 = (LCD_UPPER_MARGIN << 24) | ((LCD_HEIGHT - 1) << 14) | (LCD_LOWER_MARGIN << 6) | (LCD_VSYNC_LEN << 0); + LCDCON3 = (LCD_RIGHT_MARGIN << 19) | ((LCD_WIDTH - 1) << 8) | (LCD_LEFT_MARGIN << 0); + LCDCON4 = (LCD_HSYNC_LEN << 0); +#endif + + /* HWSWP = 1, INVVFRAM = 1, INVVLINE = 1, FRM565 = 1, All others = 0 */ + LCDCON5 = 0xB01; + + LCDSADDR1 = (LCDBANK((unsigned)FRAME) << 21) | (LCDBASEU((unsigned)FRAME)); + LCDSADDR2 = LCDBASEL((unsigned)FRAME); + LCDSADDR3 = 0x000000F0; +} + +static void LCD_CTRL_clock(bool onoff) +{ + if(onoff) + { + GPCCON &=~0xFFF000FC; + GPCCON |= 0xAAA000A8; + GPCUP |= 0xFC0E; + + GPDCON &=~0xFFF0FFF0; + GPDCON |= 0xAAA0AAA0; + GPDUP |= 0xFCFC; + + s3c_regset32(&CLKCON, 0x20); /* enable LCD clock */ + LCDCON1 |=0x01; + } + else + { + GPCCON &= ~0xFFF000FC; + GPCUP &= ~0xFC0E; + + GPDCON &= ~0xFFF0FFF0; + GPDUP &= ~0xFCFC; + + LCDCON1 &= ~1; /* Must diable first or bus may freeze */ + s3c_regclr32(&CLKCON, 0x20); /* disable LCD clock */ + } +} + +static void reset_LCD(bool reset) +{ +#ifdef GIGABEAT_F + GPBCON&=~0xC000; + GPBCON|=0x4000; + if(reset) + GPBDAT|=0x80; + else + GPBDAT&=~0x80; +#endif +} + +static void LCD_SPI_send(const unsigned char *array, int count) +{ + while (count--) + { + while ((SPSTA0&0x01)==0){}; + SPTDAT0=*array++; + } +} + +static void LCD_SPI_setreg(unsigned char reg, unsigned char value) +{ + unsigned char regval[] = + { + 0x00,reg,0x01,value + }; + LCD_SPI_send(regval, sizeof(regval)); +} + +static void LCD_SPI_SS(bool select) +{ + delay_cycles(0x4FFF); + +#ifdef GIGABEAT_F + GPBCON&=~0x30000; + GPBCON|=0x10000; + + if(select) + GPBDAT|=0x100; + else + GPBDAT&=~0x100; +#endif +} + +static void LCD_SPI_start(void) +{ + s3c_regset32(&CLKCON, 0x40000); /* enable SPI clock */ + LCD_SPI_SS(false); + SPCON0=0x3E; + SPPRE0=24; + + reset_LCD(true); + LCD_SPI_SS(true); +} + +static void LCD_SPI_stop(void) +{ + LCD_SPI_SS(false); + + SPCON0 &= ~0x10; + s3c_regclr32(&CLKCON, 0x40000); /* disable SPI clock */ +} + +static void LCD_SPI_init(void) +{ + /* + * SPI setup - Some of these registers are known; they are documented in + * the wiki. Many thanks to Alex Gerchanovsky for discovering this + * sequence. + */ + + LCD_CTRL_clock(true); + + LCD_SPI_start(); + LCD_SPI_setreg(0x0F, 0x01); + LCD_SPI_setreg(0x09, 0x06); + LCD_SPI_setreg(0x16, 0xA6); + LCD_SPI_setreg(0x1E, 0x49); + LCD_SPI_setreg(0x1F, 0x26); + LCD_SPI_setreg(0x0B, 0x2F); + LCD_SPI_setreg(0x0C, 0x2B); + LCD_SPI_setreg(0x19, 0x5E); + LCD_SPI_setreg(0x1A, 0x15); + LCD_SPI_setreg(0x1B, 0x15); + LCD_SPI_setreg(0x1D, 0x01); + LCD_SPI_setreg(0x00, 0x03); + LCD_SPI_setreg(0x01, 0x10); + LCD_SPI_setreg(0x02, 0x0A); + LCD_SPI_setreg(0x06, 0x04); /* Set the orientation */ + LCD_SPI_setreg(0x08, 0x2E); + LCD_SPI_setreg(0x24, 0x12); + LCD_SPI_setreg(0x25, 0x3F); + LCD_SPI_setreg(0x26, 0x0B); + LCD_SPI_setreg(0x27, 0x00); + LCD_SPI_setreg(0x28, 0x00); + LCD_SPI_setreg(0x29, 0xF6); + LCD_SPI_setreg(0x2A, 0x03); + LCD_SPI_setreg(0x2B, 0x0A); + LCD_SPI_setreg(0x04, 0x01); /* Turn the display on */ + LCD_SPI_stop(); +} + +/* LCD init */ +void lcd_init_device(void) +{ +#ifdef X_BOOTLOADER + int i; + /* When the Rockbox bootloader starts the framebuffer address is changed + * but the LCD display should stay the same til an lcd_update() occurs. + * This copies the data from the old framebuffer to the new one to make the + * change non-visable to the user. + */ + unsigned short *buf = (unsigned short*)(FRAME); + unsigned short *oldbuf = (unsigned short*)(LCDSADDR1<<1); + + /* The Rockbox bootloader is transitioning from RGB555I to RGB565 mode + so convert the frambuffer data accordingly */ + for(i=0; i< 320*240; i++) + { + *(buf++) = ((*oldbuf>>1) & 0x1F) | (*oldbuf & 0xffc0); + oldbuf++; + } +#endif + + /* Set pins up */ + GPHUP &= 0x600; + GPECON |= 0x0A800000; + GPEUP |= 0x3800; +#ifdef GIGABEAT_F + GPBUP |= 0x181; +#endif + + s3c_regset32(&CLKCON, 0x20); /* enable LCD clock */ + + LCD_CTRL_setup(); + LCD_SPI_init(); +} + +#if defined(HAVE_LCD_SLEEP) +static void LCD_SPI_powerdown(void) +{ + lcd_powered = false; + + LCD_SPI_start(); + LCD_SPI_setreg(0x04, 0x00); + LCD_SPI_stop(); + + reset_LCD(false); /* This makes a big difference on power */ + LCD_CTRL_clock(false); +} + +void lcd_sleep(void) +{ + if (lcd_powered) + { + /* "not powered" implies "disabled" */ + if (lcd_on) + lcd_enable(false); + + LCD_SPI_powerdown(); + } +} +#endif + +#if defined(HAVE_LCD_ENABLE) +static void LCD_SPI_powerup(void) +{ + LCD_CTRL_clock(true); + + LCD_SPI_start(); + LCD_SPI_setreg(0x04, 0x01); + LCD_SPI_stop(); + + lcd_powered = true; +} + +void lcd_enable(bool state) +{ + if (state == lcd_on) + return; + + if(state) + { + /* "enabled" implies "powered" */ + if (!lcd_powered) + { + LCD_SPI_powerup(); + /* Wait long enough for a frame to be written - yes, it + * takes awhile. */ + sleep(HZ/5); + } + + lcd_on = true; + lcd_update(); + lcd_activation_call_hook(); + } + else + { + lcd_on = false; + } +} +#endif + +void lcd_set_flip(bool yesno) { + if (!lcd_on) + return; + + LCD_SPI_start(); + if(yesno) + { + LCD_SPI_setreg(0x06, 0x02); + } + else + { + LCD_SPI_setreg(0x06, 0x04); + } + LCD_SPI_stop(); +} + +int lcd_default_contrast(void) +{ + return DEFAULT_CONTRAST_SETTING; +} + +void lcd_set_contrast(int val) { + if (!lcd_on) + return; + + LCD_SPI_start(); + LCD_SPI_setreg(0x0B, (unsigned char) val); + LCD_SPI_stop(); +} + +void lcd_set_invert_display(bool yesno) { + if (!lcd_on) + return; + + LCD_SPI_start(); + if(yesno) + { + LCD_SPI_setreg(0x27, 0x10); + } + else + { + LCD_SPI_setreg(0x27, 0x00); + } + LCD_SPI_stop(); +} + +/* Update a fraction of the display. */ +void lcd_update_rect(int x, int y, int width, int height) +{ + fb_data *dst, *src; + + if (!lcd_on) + return; + + if (x + width > LCD_WIDTH) + width = LCD_WIDTH - x; /* Clip right */ + if (x < 0) + width += x, x = 0; /* Clip left */ + if (width <= 0) + return; /* nothing left to do */ + + if (y + height > LCD_HEIGHT) + height = LCD_HEIGHT - y; /* Clip bottom */ + if (y < 0) + height += y, y = 0; /* Clip top */ + if (height <= 0) + return; /* nothing left to do */ + + /* TODO: It may be faster to swap the addresses of lcd_driver_framebuffer + * and lcd_framebuffer */ + dst = (fb_data *)FRAME + LCD_WIDTH*y + x; + src = &lcd_framebuffer[y][x]; + + /* Copy part of the Rockbox framebuffer to the second framebuffer */ + if (width < LCD_WIDTH) + { + /* Not full width - do line-by-line */ + lcd_copy_buffer_rect(dst, src, width, height); + } + else + { + /* Full width - copy as one line */ + lcd_copy_buffer_rect(dst, src, LCD_WIDTH*height, 1); + } +} + +/* Update the display. + This must be called after all other LCD functions that change the display. */ +void lcd_update(void) +{ + if (!lcd_on) + return; + + lcd_copy_buffer_rect((fb_data *)FRAME, &lcd_framebuffer[0][0], + LCD_WIDTH*LCD_HEIGHT, 1); +} + +#if 0 +void lcd_bitmap_transparent_part(const fb_data *src, int src_x, int src_y, + int stride, int x, int y, int width, + int height) +{ + int w, px; + fb_data *dst; + + if (x + width > current_vp->width) + width = current_vp->width - x; /* Clip right */ + + if (x < 0) /* Clip left */ + { + width += x; + src_x -= x; + x = 0; + } + + if (width <= 0) + return; /* nothing left to do */ + + if (y + height > current_vp->height) + height = current_vp->height - y; /* Clip bottom */ + + if (y < 0) /* Clip top */ + { + height += y; + src_y -= y; + y = 0; + } + + if (height <= 0) + return; /* nothing left to do */ + + src += stride * src_y + src_x; /* move starting point */ + dst = &lcd_framebuffer[current_vp->y+y][current_vp->x+x]; + + asm volatile ( + ".rowstart: \r\n" + "mov %[w], %[width] \r\n" /* Load width for inner loop */ + ".nextpixel: \r\n" + "ldrh %[px], [%[s]], #2 \r\n" /* Load src pixel */ + "add %[d], %[d], #2 \r\n" /* Uncoditionally increment dst */ + "cmp %[px], %[fgcolor] \r\n" /* Compare to foreground color */ + "streqh %[fgpat], [%[d], #-2] \r\n" /* Store foregroud if match */ + "cmpne %[px], %[transcolor] \r\n" /* Compare to transparent color */ + "strneh %[px], [%[d], #-2] \r\n" /* Store dst if not transparent */ + "subs %[w], %[w], #1 \r\n" /* Width counter has run down? */ + "bgt .nextpixel \r\n" /* More in this row? */ + "add %[s], %[s], %[sstp], lsl #1 \r\n" /* Skip over to start of next line */ + "add %[d], %[d], %[dstp], lsl #1 \r\n" + "subs %[h], %[h], #1 \r\n" /* Height counter has run down? */ + "bgt .rowstart \r\n" /* More rows? */ + : [w]"=&r"(w), [h]"+&r"(height), [px]"=&r"(px), + [s]"+&r"(src), [d]"+&r"(dst) + : [width]"r"(width), + [sstp]"r"(stride - width), + [dstp]"r"(LCD_WIDTH - width), + [transcolor]"r"(TRANSPARENT_COLOR), + [fgcolor]"r"(REPLACEWITHFG_COLOR), + [fgpat]"r"(current_vp->fg_pattern) + ); +} +#endif + +void lcd_yuv_set_options(unsigned options) +{ + lcd_yuv_options = options; +} + +/* Line write helper function for lcd_yuv_blit. Write two lines of yuv420. */ +extern void lcd_write_yuv420_lines(fb_data *dst, + unsigned char const * const src[3], + int width, + int stride); +extern void lcd_write_yuv420_lines_odither(fb_data *dst, + unsigned char const * const src[3], + int width, + int stride, + int x_screen, /* To align dither pattern */ + int y_screen); +/* Performance function to blit a YUV bitmap directly to the LCD */ +/* For the Gigabeat - show it rotated */ +/* So the LCD_WIDTH is now the height */ +void lcd_blit_yuv(unsigned char * const src[3], + int src_x, int src_y, int stride, + int x, int y, int width, int height) +{ + /* Caches for chroma data so it only need be recaculated every other + line */ + unsigned char const * yuv_src[3]; + off_t z; + + if (!lcd_on) + return; + + /* Sorry, but width and height must be >= 2 or else */ + width &= ~1; + height >>= 1; + + y = LCD_WIDTH - 1 - y; + fb_data *dst = (fb_data*)FRAME + x * LCD_WIDTH + y; + + z = stride*src_y; + yuv_src[0] = src[0] + z + src_x; + yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1); + yuv_src[2] = src[2] + (yuv_src[1] - src[1]); + + if (lcd_yuv_options & LCD_YUV_DITHER) + { + do + { + lcd_write_yuv420_lines_odither(dst, yuv_src, width, stride, y, x); + yuv_src[0] += stride << 1; /* Skip down two luma lines */ + yuv_src[1] += stride >> 1; /* Skip down one chroma line */ + yuv_src[2] += stride >> 1; + dst -= 2; + y -= 2; + } + while (--height > 0); + } + else + { + do + { + lcd_write_yuv420_lines(dst, yuv_src, width, stride); + yuv_src[0] += stride << 1; /* Skip down two luma lines */ + yuv_src[1] += stride >> 1; /* Skip down one chroma line */ + yuv_src[2] += stride >> 1; + dst -= 2; + } + while (--height > 0); + } +} + --- firmware/target/arm/s3c2440/lyre_proto2/lcd-target.h Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/lcd-target.h Thu Jan 15 09:14:12 1970 @@ -0,0 +1,32 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: lcd-target.h 17847 2008-06-28 18:10:04Z bagder $ + * + * Copyright (C) 2007 by Greg White + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ + +extern void lcd_enable(bool state); + +#define LCD_PIXCLOCK 4 + +#define LCD_RIGHT_MARGIN 25 +#define LCD_LEFT_MARGIN 0 +#define LCD_HSYNC_LEN 4 + +#define LCD_UPPER_MARGIN 1 +#define LCD_LOWER_MARGIN 4 +#define LCD_VSYNC_LEN 1 --- firmware/target/arm/s3c2440/lyre_proto2/system-lyre_proto2.c Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/system-lyre_proto2.c Thu Jan 15 09:14:12 1970 @@ -0,0 +1,243 @@ +/*************************************************************************** +* __________ __ ___. +* Open \______ \ ____ ____ | | _\_ |__ _______ ___ +* Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / +* Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < +* Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ +* \/ \/ \/ \/ \/ +* $Id: system-meg-fx.c 20767 2009-04-21 04:35:10Z kkurbjun $ +* +* Copyright (C) 2007 by Michael Sevakis +* +* This program is free software; you can redistribute it and/or +* modify it under the terms of the GNU General Public License +* as published by the Free Software Foundation; either version 2 +* of the License, or (at your option) any later version. +* +* This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY +* KIND, either express or implied. +* +****************************************************************************/ +#include "kernel.h" +#include "system.h" +#include "panic.h" +#include "mmu-arm.h" +#include "cpu.h" + +#define default_interrupt(name) \ + extern __attribute__((weak,alias("UIRQ"))) void name (void) + +default_interrupt(EINT0); +default_interrupt(EINT1); +default_interrupt(EINT2); +default_interrupt(EINT3); +default_interrupt(EINT4_7); +default_interrupt(EINT8_23); +default_interrupt(CAM); +default_interrupt(nBATT_FLT); +default_interrupt(TICK); +default_interrupt(WDT_AC97); +default_interrupt(TIMER0); +default_interrupt(TIMER1); +default_interrupt(TIMER2); +default_interrupt(TIMER3); +default_interrupt(TIMER4); +default_interrupt(UART2); +default_interrupt(LCD); +default_interrupt(DMA0); +default_interrupt(DMA1); +default_interrupt(DMA2); +default_interrupt(DMA3); +default_interrupt(SDI); +default_interrupt(SPI0); +default_interrupt(UART1); +default_interrupt(NFCON); +default_interrupt(USBD); +default_interrupt(USBH); +default_interrupt(IIC); +default_interrupt(UART0); +default_interrupt(SPI1); +default_interrupt(RTC); +default_interrupt(ADC); + +static void (* const irqvector[32])(void) __attribute__((__used__)) = +{ + EINT0, EINT1, EINT2, EINT3, + EINT4_7, EINT8_23, CAM, nBATT_FLT, TICK, WDT_AC97, + TIMER0, TIMER1, TIMER2, TIMER3, TIMER4, UART2, + LCD, DMA0, DMA1, DMA2, DMA3, SDI, + SPI0, UART1, NFCON, USBD, USBH, IIC, + UART0, SPI1, RTC, ADC, +}; + +static const char * const irqname[32] = +{ + "EINT0", "EINT1", "EINT2", "EINT3", + "EINT4_7", "EINT8_23", "CAM", "nBATT_FLT", "TICK", "WDT_AC97", + "TIMER0", "TIMER1", "TIMER2", "TIMER3", "TIMER4", "UART2", + "LCD", "DMA0", "DMA1", "DMA2", "DMA3", "SDI", + "SPI0", "UART1", "NFCON", "USBD", "USBH", "IIC", + "UART0", "SPI1", "RTC", "ADC" +}; + +static void UIRQ(void) +{ + unsigned int offset = INTOFFSET; + panicf("Unhandled IRQ %02X: %s", offset, irqname[offset]); +} + +void irq_handler(void) __attribute__((interrupt ("IRQ"), naked)); +void irq_handler(void) +{ + asm volatile ( + "sub lr, lr, #4 \r\n" + "stmfd sp!, {r0-r3, ip, lr} \r\n" + "mov r0, #0x4a000000 \r\n" /* INTOFFSET = 0x4a000014 */ + "ldr r0, [r0, #0x14] \r\n" + "ldr r1, =irqvector \r\n" + "ldr r1, [r1, r0, lsl #2] \r\n" + "mov lr, pc \r\n" + "bx r1 \r\n" + "ldmfd sp!, {r0-r3, ip, pc}^ \r\n" + ); +} + +void system_reboot(void) +{ + WTCON = 0; + WTCNT = WTDAT = 1 ; + WTCON = 0x21; + for(;;) + ; +} + +void system_exception_wait(void) +{ + INTMSK = 0xFFFFFFFF; + while ((GPGDAT & (1 << 0)) == 0); /* Wait for power button */ +} + +static void set_page_tables(void) +{ + /* map every memory region to itself */ + map_section(0, 0, 0x1000, CACHE_NONE); + + /* map RAM to 0 and enable caching for it */ + map_section(0x30000000, 0, 32, CACHE_ALL); + + /* enable buffered writing for the framebuffer */ + map_section((int)FRAME, (int)FRAME, 1, BUFFERED); +} + +void memory_init(void) +{ + ttb_init(); + set_page_tables(); + enable_mmu(); +} + +void s3c_regmod32(volatile unsigned long *reg, unsigned long bits, + unsigned long mask) +{ + int oldstatus = disable_interrupt_save(IRQ_FIQ_STATUS); + *reg = (*reg & ~mask) | (bits & mask); + restore_interrupt(oldstatus); +} + +void s3c_regset32(volatile unsigned long *reg, unsigned long bits) +{ + s3c_regmod32(reg, bits, bits); +} + +void s3c_regclr32(volatile unsigned long *reg, unsigned long bits) +{ + s3c_regmod32(reg, 0, bits); +} + +#ifdef BOOTLOADER +void system_prepare_fw_start(void) +{ + tick_stop(); + disable_interrupt(IRQ_FIQ_STATUS); + INTMSK = 0xFFFFFFFF; +} +#endif + +void system_init(void) +{ + INTMSK = 0xFFFFFFFF; + INTMOD = 0; + SRCPND = 0xFFFFFFFF; + INTPND = 0xFFFFFFFF; + INTSUBMSK = 0xFFFFFFFF; + SUBSRCPND = 0xFFFFFFFF; + + GPBCON |= 0x85; + GPBDAT |= 0x07; + GPBUP |= 0x20F; + + /* Take care of flash related pins */ + GPCCON |= 0x1000; + GPCDAT &= ~0x40; + GPCUP |= 0x51; + + GPDCON |= 0x05; + GPDUP |= 0x03; + GPDDAT &= ~0x03; + + GPFCON |= 0x00000AAA; + GPFUP |= 0xFF; + + GPGCON |= 0x01001000; + GPGUP |= 0x70; + + GPHCON |= 0x4005; + GPHDAT |= 0x03; + + /* TODO: do something with PRIORITY */ + + /* Turn off currently-not or never-needed devices. + * Be careful here, it is possible to freeze the device by disabling + * clocks at the wrong time. + * + * Turn off AC97, Camera, SPI, IIS, I2C, UARTS, MMC/SD/SDIO Controller + * USB device, USB host, NAND flash controller. + * + * IDLE, Sleep, LCDC, PWM timer, GPIO, RTC, and ADC are untouched (on) + */ + CLKCON &= ~0xFF1ED0; + + CLKSLOW |= 0x80; +} + +int system_memory_guard(int newmode) +{ + (void)newmode; + return 0; +} + +#ifdef HAVE_ADJUSTABLE_CPU_FREQ + +void set_cpu_frequency(long frequency) +{ + if (frequency == CPUFREQ_MAX) + { + asm volatile("mov r0, #0\n" + "mrc p15, 0, r0, c1, c0, 0\n" + "orr r0, r0, #3<<30\n" /* set to Asynchronous mode*/ + "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); + + FREQ = CPUFREQ_MAX; + } + else + { + asm volatile("mov r0, #0\n" + "mrc p15, 0, r0, c1, c0, 0\n" + "bic r0, r0, #3<<30\n" /* set to FastBus mode*/ + "mcr p15, 0, r0, c1, c0, 0" : : : "r0"); + + FREQ = CPUFREQ_NORMAL; + } +} + +#endif --- firmware/target/arm/s3c2440/lyre_proto2/system-target.h Thu Jan 15 09:14:12 1970 +++ firmware/target/arm/s3c2440/lyre_proto2/system-target.h Thu Jan 15 09:14:12 1970 @@ -0,0 +1,44 @@ +/*************************************************************************** + * __________ __ ___. + * Open \______ \ ____ ____ | | _\_ |__ _______ ___ + * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ / + * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < < + * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \ + * \/ \/ \/ \/ \/ + * $Id: system-target.h 19980 2009-02-11 23:56:00Z jethead71 $ + * + * Copyright (C) 2007 by Greg White + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY + * KIND, either express or implied. + * + ****************************************************************************/ +#ifndef SYSTEM_TARGET_H +#define SYSTEM_TARGET_H + +#include "system-arm.h" +#include "mmu-arm.h" + +#define CPUFREQ_DEFAULT 98784000 +#define CPUFREQ_NORMAL 98784000 +#define CPUFREQ_MAX 296352000 + +void system_prepare_fw_start(void); +void tick_stop(void); + +/* Functions to set and clear regiser bits atomically */ + +/* Set and clear register bits */ +void s3c_regmod32(volatile unsigned long *reg, unsigned long bits, + unsigned long mask); +/* Set register bits */ +void s3c_regset32(volatile unsigned long *reg, unsigned long bits); +/* Clear register bits */ +void s3c_regclr32(volatile unsigned long *reg, unsigned long bits); + +#endif /* SYSTEM_TARGET_H */ --- tools/configure Thu Jan 15 09:14:12 1970 +++ tools/configure Thu Jan 15 09:14:12 1970 @@ -91,6 +91,21 @@ sdl_cflags="" sdl_libs="" + # generic sdl-config checker + sdl=`findtool sdl-config` + sdl_cflags="" + sdl_libs="" + + # generic sdl-config checker + sdl=`findtool sdl-config` + sdl_cflags="" + sdl_libs="" + + # generic sdl-config checker + sdl=`findtool sdl-config` + sdl_cflags="" + sdl_libs="" + if [ $1 = "sdl" ]; then if [ -z "$sdl" ]; then echo "configure didn't find sdl-config, which indicates that you" @@ -887,7 +902,7 @@ ==Samsung== ==Tatung== 140) YH-820 150) Elio TPJ-1022 ==Lyre project== 141) YH-920 130) Lyre proto 1 - 142) YH-925 + 142) YH-925 131) Lyre proto 2 143) YP-S3 EOF @@ -2275,6 +2290,72 @@ t_cpu="arm" t_manufacturer="at91sam" t_model="lyre_proto1" + ;; + + 131|lyre_proto2) + target_id=99 + modelname="lyre_proto2" + target="-DLYRE_PROTO2" + memory=64 + arm9tdmicc + tool="cp" + bmp2rb_mono="$rootdir/tools/bmp2rb -f 0" + bmp2rb_native="$rootdir/tools/bmp2rb -f 4" + output="rockbox.lyre" + appextra="recorder:gui" + plugins="" + swcodec="yes" + toolset=$scramblebitmaptools + boottool="cp" + bootoutput="bootloader-proto2.lyre" + # architecture, manufacturer and model for the target-tree build + t_cpu="arm" + t_manufacturer="s3c2440" + t_model="lyre_proto2" + ;; + + 131|lyre_proto2) + target_id=99 + modelname="lyre_proto2" + target="-DLYRE_PROTO2" + memory=64 + arm9tdmicc + tool="cp" + bmp2rb_mono="$rootdir/tools/bmp2rb -f 0" + bmp2rb_native="$rootdir/tools/bmp2rb -f 4" + output="rockbox.lyre" + appextra="recorder:gui" + plugins="" + swcodec="yes" + toolset=$scramblebitmaptools + boottool="cp" + bootoutput="bootloader-proto2.lyre" + # architecture, manufacturer and model for the target-tree build + t_cpu="arm" + t_manufacturer="s3c2440" + t_model="lyre_proto2" + ;; + + 131|lyre_proto2) + target_id=99 + modelname="lyre_proto2" + target="-DLYRE_PROTO2" + memory=64 + arm9tdmicc + tool="cp" + bmp2rb_mono="$rootdir/tools/bmp2rb -f 0" + bmp2rb_native="$rootdir/tools/bmp2rb -f 4" + output="rockbox.lyre" + appextra="recorder:gui" + plugins="" + swcodec="yes" + toolset=$scramblebitmaptools + boottool="cp" + bootoutput="bootloader-proto2.lyre" + # architecture, manufacturer and model for the target-tree build + t_cpu="arm" + t_manufacturer="s3c2440" + t_model="lyre_proto2" ;; 140|yh820)