Index: firmware/target/arm/system-pp502x.c
===================================================================
--- firmware/target/arm/system-pp502x.c	(revision 31026)
+++ firmware/target/arm/system-pp502x.c	(working copy)
@@ -220,13 +220,33 @@
 }
 void cpucache_flush(void) __attribute__((alias("cpucache_commit")));
 
+char cachetrashed[2048] CACHEALIGN_ATTR;
+
 void ICODE_ATTR cpucache_commit_discard(void)
 {
     if (CACHE_CTL & CACHE_CTL_ENABLE)
     {
+        register int istat = disable_interrupt_save(IRQ_FIQ_STATUS);
+        
         CACHE_OPERATION |= CACHE_OP_FLUSH | CACHE_OP_INVALIDATE;
         while ((CACHE_CTL & CACHE_CTL_BUSY) != 0);
         nop; nop; nop; nop;
+
+        register unsigned long a;
+        for (a = (unsigned long)cachetrashed;
+             a < (unsigned long)cachetrashed + sizeof(cachetrashed); 
+             a += CACHEALIGN_SIZE)
+        {
+            register unsigned long s = (a >> 11) | 0x800000;
+            register unsigned long l = (unsigned long)&CACHE_STATUS_BASE +
+                                       (a & 0x7F0);
+            *(volatile unsigned long *)(l) = s;
+            *(volatile unsigned long *)(l + 0x800) = s;
+            *(volatile unsigned long *)(l + 0x1000) = s;
+            *(volatile unsigned long *)(l + 0x1800) = s;
+        }
+
+        restore_interrupt(istat);
     }
 }
 void cpucache_invalidate(void) __attribute__((alias("cpucache_commit_discard")));
@@ -257,6 +277,7 @@
     /* enable cache */
     CACHE_CTL |= CACHE_CTL_INIT | CACHE_CTL_ENABLE | CACHE_CTL_RUN;
     nop; nop; nop; nop;
+    cpucache_invalidate();
 }
 #endif /* BOOTLOADER || HAVE_BOOTLOADER_USB_MODE */