Index: apps/playback.c =================================================================== --- apps/playback.c (revision 20029) +++ apps/playback.c (working copy) @@ -610,6 +610,11 @@ return &temp_id3; } +int audio_current_tracknum(void) +{ + return playlist_next(0)+wps_offset; +} + struct mp3entry* audio_next_track(void) { int next_idx; Index: apps/playback.h =================================================================== --- apps/playback.h (revision 20029) +++ apps/playback.h (working copy) @@ -30,6 +30,7 @@ void voice_wait(void); bool audio_is_thread_ready(void); int audio_track_count(void); +int audio_current_tracknum(void); long audio_filebufused(void); void audio_pre_ff_rewind(void); void audio_set_crossfade(int type); Index: apps/iap.c =================================================================== --- apps/iap.c (revision 20029) +++ apps/iap.c (working copy) @@ -471,7 +471,7 @@ case 0x001E: { unsigned char data[] = {0x04, 0x00, 0x1F, 0x00, 0x00, 0x00, 0x00}; - long playlist_pos = playlist_next(0); + long playlist_pos = audio_current_tracknum(); playlist_pos -= playlist_get_first_index(NULL); if(playlist_pos < 0) playlist_pos += playlist_amount(); @@ -503,7 +503,7 @@ /* If the tracknumber is not the current one, read id3 from disk */ - if(playlist_next(0) != tracknum) + if(audio_current_tracknum() != tracknum) { struct playlist_track_info info; playlist_get_track_info(NULL, tracknum, &info); @@ -686,7 +686,12 @@ (signed long)serbuf[6] << 8 | serbuf[7]; if (!wps_state.paused) audio_pause(); - audio_skip(tracknum - playlist_next(0)); + + tracknum += playlist_get_first_index(NULL); + if(tracknum >= playlist_amount()) + tracknum -= playlist_amount(); + + audio_skip(tracknum - audio_current_tracknum()); if (!wps_state.paused) audio_resume(); Index: firmware/export/config-ipodmini2g.h =================================================================== --- firmware/export/config-ipodmini2g.h (revision 20029) +++ firmware/export/config-ipodmini2g.h (working copy) @@ -196,4 +196,7 @@ #define ICODE_ATTR_TREMOR_NOT_MDCT +#define IPOD_ACCESSORY_PROTOCOL +#define HAVE_SERIAL + #endif Index: firmware/target/arm/system-pp502x.c =================================================================== --- firmware/target/arm/system-pp502x.c (revision 20029) +++ firmware/target/arm/system-pp502x.c (working copy) @@ -31,7 +31,7 @@ #ifndef BOOTLOADER extern void TIMER1(void); extern void TIMER2(void); -extern void SERIAL0(void); +extern void SERIAL_ISR(void); extern void ipod_mini_button_int(void); /* iPod Mini 1st gen only */ extern void ipod_4g_button_int(void); /* iPod 4th gen and higher only */ @@ -146,8 +146,11 @@ #endif #ifdef IPOD_ACCESSORY_PROTOCOL else if (CPU_HI_INT_STAT & SER0_MASK) { - SERIAL0(); + SERIAL_ISR(); } + else if (CPU_HI_INT_STAT & SER1_MASK) { + SERIAL_ISR(); + } #endif } else { if (COP_INT_STAT & TIMER2_MASK) Index: firmware/drivers/serial.c =================================================================== --- firmware/drivers/serial.c (revision 20029) +++ firmware/drivers/serial.c (working copy) @@ -31,6 +31,8 @@ #include "lcd.h" #include "serial.h" #include "iap.h" +#include "pcf5060x.h" +#include "pcf50605.h" #if CONFIG_CPU == IMX31L #include "serial-imx31.h" @@ -250,21 +252,84 @@ #elif defined(IPOD_ACCESSORY_PROTOCOL) static int autobaud = 0; +volatile unsigned long * base_RBR, * base_THR, * base_LCR, * base_LSR, * base_DLL; + void serial_setup (void) { int tmp; -#if (MODEL_NUMBER == 3) || (MODEL_NUMBER == 8) +#if 0 + /* Route the Tx/Rx pins. 4G Ipod, ser0, top connector */ - /* Route the Tx/Rx pins. 4G Ipod??? */ - outl(0x70000018, inl(0x70000018) & ~0xc00); -#elif (MODEL_NUMBER == 4) || (MODEL_NUMBER == 5) + GPIO_CLEAR_BITWISE(GPIOC_INT_EN, 0x8); + GPIO_CLEAR_BITWISE(GPIOC_INT_LEV, 0x8); + GPIOC_INT_CLR = 0x8; + + base_RBR = &SER0_RBR; + base_THR = &SER0_THR; + base_LCR = &SER0_LCR; + base_LSR = &SER0_LSR; + base_DLL = &SER0_DLL; + DEV_EN |= DEV_SER0; + CPU_HI_INT_DIS = SER0_MASK; + + DEV_RS |= DEV_SER0; + sleep(1); + DEV_RS &= ~DEV_SER0; + + SER0_LCR = 0x80; /* Divisor latch enable */ + SER0_DLM = 0x00; + SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + SER0_IER = 0x01; + + SER0_FCR = 0x07; /* Tx+Rx FIFO reset and FIFO enable */ + + CPU_INT_EN = HI_MASK; + CPU_HI_INT_EN = SER0_MASK; + tmp = SER0_RBR; + +#elif defined(IPOD_COLOR) || defined(IPOD_MINI2G) || defined(IPOD_4G) + + /* Route the Tx/Rx pins. 4G Ipod, ser1, dock connector */ + GPIO_CLEAR_BITWISE(GPIOD_ENABLE, 0x6); + GPIO_CLEAR_BITWISE(GPIOD_OUTPUT_EN, 0x6); + + base_RBR = &SER1_RBR; + base_THR = &SER1_THR; + base_LCR = &SER1_LCR; + base_LSR = &SER1_LSR; + base_DLL = &SER1_DLL; + + DEV_EN |= DEV_SER1; + CPU_HI_INT_DIS = SER1_MASK; + + DEV_RS |= DEV_SER1; + sleep(1); + DEV_RS &= ~DEV_SER1; + + SER1_LCR = 0x80; /* Divisor latch enable */ + SER1_DLM = 0x00; + SER1_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + SER1_IER = 0x01; + + SER1_FCR = 0x07; /* Tx+Rx FIFO reset and FIFO enable */ + + CPU_INT_EN = HI_MASK; + CPU_HI_INT_EN = SER1_MASK; + tmp = SER1_RBR; + +#elif defined(IPOD_VIDEO) || defined(IPOD_NANO) /* Route the Tx/Rx pins. 5G Ipod */ (*(volatile unsigned long *)(0x7000008C)) &= ~0x0C; GPO32_ENABLE &= ~0x0C; -#endif + base_RBR = &SER0_RBR; + base_THR = &SER0_THR; + base_LCR = &SER0_LCR; + base_LSR = &SER0_LSR; + base_DLL = &SER0_DLL; + DEV_EN = DEV_EN | DEV_SER0; CPU_HI_INT_DIS = SER0_MASK; @@ -279,33 +344,35 @@ SER0_FCR = 0x07; /* Tx+Rx FIFO reset and FIFO enable */ - CPU_INT_EN |= HI_MASK; - CPU_HI_INT_EN |= SER0_MASK; + CPU_INT_EN = HI_MASK; + CPU_HI_INT_EN = SER0_MASK; tmp = SER0_RBR; +#endif serial_bitrate(0); } + void serial_bitrate(int rate) { if(rate == 0) { autobaud = 2; - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ return; } autobaud = 0; - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 24000000L / rate / 16; - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 24000000L / rate / 16; + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ } int tx_rdy(void) { - if((SER0_LSR & 0x20)) + if((*base_LSR & 0x20)) return 1; else return 0; @@ -313,7 +380,7 @@ int rx_rdy(void) { - if((SER0_LSR & 0x1)) + if((*base_LSR & 0x1)) return 1; else return 0; @@ -321,15 +388,15 @@ void tx_writec(unsigned char c) { - SER0_THR =(int) c; + *base_THR =(int) c; } unsigned char rx_readc(void) { - return (SER0_RBR & 0xFF); + return (*base_RBR & 0xFF); } -void SERIAL0(void) +void SERIAL_ISR(void) { static int badbaud = 0; static bool newpkt = true; @@ -348,15 +415,15 @@ case 0x55: break; case 0xFC: - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x4E; /* 24000000/78/16 = 19230 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x4E; /* 24000000/78/16 = 19230 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ temp = 0xFF; break; case 0xE0: - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x9C; /* 24000000/156/16 = 9615 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x9C; /* 24000000/156/16 = 9615 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ temp = 0xFF; break; default: @@ -364,14 +431,14 @@ if (badbaud >= 6) /* Switch baud detection mode */ { autobaud = 2; - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ badbaud = 0; } else { - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ } continue; } @@ -382,21 +449,21 @@ case 0x55: break; case 0xFE: - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ temp = 0xFF; break; case 0xFC: - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x27; /* 24000000/39/16 = 38461 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x27; /* 24000000/39/16 = 38461 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ temp = 0xFF; break; case 0xE0: - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x4E; /* 24000000/78/16 = 19230 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x4E; /* 24000000/78/16 = 19230 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ temp = 0xFF; break; default: @@ -404,14 +471,14 @@ if (badbaud >= 6) /* Switch baud detection */ { autobaud = 1; - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x1A; /* 24000000/26/16 = 57692 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ badbaud = 0; } else { - SER0_LCR = 0x80; /* Divisor latch enable */ - SER0_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */ - SER0_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ + *base_LCR = 0x80; /* Divisor latch enable */ + *base_DLL = 0x0D; /* 24000000/13/16 = 115384 baud */ + *base_LCR = 0x03; /* Divisor latch disable, 8-N-1 */ } continue; }