SoC is build around ZSP400 type 24-bit DSP clocked up to 80MHz and as such is not suitable target for rockbox. Some documents leaked to internet as well as more or less complete SDK.
SoC is build around ARM7EJ?-S (ARMv5TE? architecture) core with additional ZSP400 (or more advanced ZSP500) DSP coprocessor. The ZSP400 is a DSP with dual issue 16 bit MACs and a well documented architecture. There are some preliminary datasheets floating in internet as well as more or less complete SDK for the rockchip firmware. There is no free toolchain for ZSP400 architecture as far as I know. A port exists to the official rockchip reference design: see: Rockchip27xxPort Main prameters of the SoC are as follows:
SoC from 2009 is build around ARM926EJ?-S core with additional DSP core (ZSP800 probably). Some technical materials leaked to internet. The max frequency is between 350-600 MHz for ARM and 400-550 MHz for DSP (there is big discrepancy in various materials about this chip). It is quite widespread in cheap tablets running android.
SoC based on Cortex A8 core with one NEON coprocessor (around 1GHz upper freq limit). It integrates GPU 2D/3D fully compatible with OpenGL? ES2.0, ES1.1 and OpenVG? standards, hardware video decoder (H264, H263, RMVB, MPEG2, MPEG4, VC1, AVS, VP8), hardware video encodec for H264, hardware accelerators (encoder/decoder) for JPEG. Other then this the chip integrates common set of peripherals such as nand, sd, ddr ram, i2s, i2c, uart, spi, usb otg, rtc, pwm, adc, lcdc.
r9 - 27 Apr 2012 - 12:04:54 - MarcinBukat
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