STMP37xx Pins
Overview
This page summarizes the different pin functions of the STMP37xx. There are two variants: the STMP3700 and the STMP3780 (aka IMX233). The STMP3700 is a generic name for the STMP3700, STMP3710, STMP3760, STMP3770 and some other variants. Each variant has a 169BGA and a LQFP128 version but we only refer to the BGA169 one because this the only one we have seen. The table below summarizes the different packages of the different chips known.
Chip |
STMP3710 |
STMP3731 |
STMP3738 |
STMP3750 |
STMP3760 |
STMP3770 |
STMP3780 |
LQFP Package |
100-pin |
128-pin |
128-pin |
128-pin |
128-pin |
100-pin |
128-pin |
BGA Package |
100-pin |
169-pin |
169-pin |
169-pin |
169-pin |
100-pin |
169-pin |
Important Note: it is unclear whether the 100-pin packages use a different pin map or not since. The
CreativeZENStyleM300 uses a 100-pin LQFP package.
Generation
These tables were computer generated using the attached program. If you find any error, please report it to
AmauryPouly or on the irc channel.
STMP3780/IMX233 BGA169
This table is based on the i.MX233 documentation.
Bank 0 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 0 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
gpmi_d15 |
gpmi_d14 |
gpmi_d13 |
gpmi_d12 |
gpmi_d11 |
gpmi_d10 |
gpmi_d9 |
gpmi_d8 |
gpmi_d7 |
gpmi_d6 |
gpmi_d5 |
gpmi_d4 |
gpmi_d3 |
gpmi_d2 |
gpmi_d1 |
gpmi_d0 |
select = 1 |
auart2_tx |
auart2_rx |
lcd_d23 |
lcd_d22 |
lcd_d21 |
lcd_d20 |
lcd_d19 |
lcd_d18 |
lcd_d15 |
lcd_d14 |
lcd_d13 |
lcd_d12 |
lcd_d11 |
lcd_d10 |
lcd_d9 |
lcd_d8 |
select = 2 |
gpmi_ce3n |
|
|
|
ssp1_d7 |
ssp1_d6 |
ssp1_d5 |
ssp1_d4 |
ssp2_d7 |
ssp2_d6 |
ssp2_d5 |
ssp2_d4 |
ssp2_d3 |
ssp2_d2 |
ssp2_d1 |
ssp2_d0 |
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 0 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 1 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
i2c_sd |
i2c_clk |
auart1_tx |
auart1_rx |
auart1_rts |
auart1_cts |
gpmi_rdn |
gpmi_wrn |
gpmi_wpn |
gpmi_rb3 |
gpmi_rb2 |
gpmi_rb1 |
gpmi_rb0 |
gpmi_ce2n |
gpmi_ale |
gpmi_cle |
select = 1 |
gpmi_ce2n |
gpmi_rb2 |
ir_out_data |
ir_in_data |
ir_clk |
|
|
|
|
|
|
|
|
gpmi_a2 |
lcd_d17 |
lcd_d16 |
select = 2 |
auart1_rx |
auart1_tx |
ssp1_d7 |
ssp1_d6 |
ssp1_d5 |
ssp1_d4 |
|
ssp2_sck |
|
|
|
ssp2_cmd |
ssp2_det |
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 1 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 2 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
lcd_d15 |
lcd_d14 |
lcd_d13 |
lcd_d12 |
lcd_d11 |
lcd_d10 |
lcd_d9 |
lcd_d8 |
lcd_d7 |
lcd_d6 |
lcd_d5 |
lcd_d4 |
lcd_d3 |
lcd_d2 |
lcd_d1 |
lcd_d0 |
select = 1 |
etm_da7 |
etm_da6 |
etm_da5 |
etm_da4 |
etm_da3 |
etm_da2 |
etm_da1 |
etm_da0 |
etm_da15 |
etm_da14 |
etm_da13 |
etm_da12 |
etm_da11 |
etm_da10 |
etm_da9 |
etm_da8 |
select = 2 |
saif1_d1 |
saif1_d2 |
saif2_d2 |
saif2_d1 |
saif_lrclk |
saif_bitclk |
saif1_d0 |
saif2_d0 |
|
|
|
|
|
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 1 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 3 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
|
pwm_4 |
pwm_3 |
pwm_2 |
pwm_1 |
pwm_0 |
lcd_vsync |
lcd_hsync |
lcd_enable |
lcd_dotclk |
lcd_cs |
lcd_wr |
lcd_rs |
lcd_reset |
lcd_d17 |
lcd_d16 |
select = 1 |
|
etm_tclk |
etm_tctl |
gpmi_rb3 |
timrot2 |
timrot1 |
lcd_busy |
i2c_sd |
i2c_clk |
gpmi_rb3 |
|
|
etm_tclk |
etm_tctl |
|
|
select = 2 |
|
auart1_rts |
auart1_cts |
|
duart_tx |
duart_rx |
|
|
|
|
|
|
|
gpmi_ce3n |
|
saif1_alt_bitclk |
select = 3 |
|
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 2 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 4 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
emi_a06 |
emi_a05 |
emi_a04 |
emi_a03 |
emi_a02 |
emi_a01 |
emi_a00 |
timrot2 |
timrot1 |
ssp1_sck |
ssp1_d3 |
ssp1_d2 |
ssp1_d1 |
ssp1_d0 |
ssp1_det |
ssp1_cmd |
select = 1 |
|
|
|
|
|
|
|
auart2_cts |
auart2_rts |
|
|
i2c_sd |
i2c_clk |
|
gpmi_ce3n |
|
select = 2 |
|
|
|
|
|
|
|
gpmi_ce3n |
spdif |
jtag_trst_n |
jtag_tms |
jtag_rtck |
jtag_tck |
jtag_tdi |
usb_otg_id |
jtag_tdo |
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 2 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 5 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
emi_wen |
emi_rasn |
emi_cke |
gpmi_ce0n |
gpmi_ce1n |
emi_ce1n |
emi_ce0n |
emi_casn |
emi_ba1 |
emi_ba0 |
emi_a12 |
emi_a11 |
emi_a10 |
emi_a09 |
emi_a08 |
emi_a07 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 3 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 6 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
emi_d15 |
emi_d14 |
emi_d13 |
emi_d12 |
emi_d11 |
emi_d10 |
emi_d9 |
emi_d8 |
emi_d7 |
emi_d6 |
emi_d5 |
emi_d4 |
emi_d3 |
emi_d2 |
emi_d1 |
emi_d0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
|
Bank 3 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 7 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
|
|
|
|
|
|
|
|
|
|
emi_clkn |
emi_clk |
emi_dqs1 |
emi_dqs0 |
emi_dqm1 |
emi_dqm0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
|
|
|
|
|
|
|
|
|
|
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
|
STMP3700 BGA169
This table is based on the linux code available plus some reverse engineering, its content might not be reliable.
Bank 0 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 0 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
gpmi_d15 |
gpmi_d14 |
gpmi_d13 |
gpmi_d12 |
gpmi_d11 |
gpmi_d10 |
gpmi_d9 |
gpmi_d8 |
gpmi_d7 |
gpmi_d6 |
gpmi_d5 |
gpmi_d4 |
gpmi_d3 |
gpmi_d2 |
gpmi_d1 |
gpmi_d0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 0 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 1 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
|
|
auart2_tx |
auart2_rx |
auart2_rts |
auart2_cts |
gpmi_rdn |
gpmi_wrn |
gpmi_irq |
gpmi_resetn |
gpmi_rb3 |
gpmi_rb2 |
gpmi_rb0 |
gpmi_a2 |
gpmi_a1 |
gpmi_a0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 1 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 2 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
lcd_d15 |
lcd_d14 |
lcd_d13 |
lcd_d12 |
lcd_d11 |
lcd_d10 |
lcd_d9 |
lcd_d8 |
lcd_d7 |
lcd_d6 |
lcd_d5 |
lcd_d4 |
lcd_d3 |
lcd_d2 |
lcd_d1 |
lcd_d0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 1 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 3 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
|
|
|
ssp1_det |
ssp1_d3 |
ssp1_d2 |
ssp1_d1 |
ssp1_d0 |
ssp1_sck |
ssp1_cmd |
lcd_busy |
lcd_enable |
lcd_rs |
lcd_wr |
lcd_rs |
lcd_reset |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
|
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 2 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 4 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
emi_ce3n |
emi_ce2n |
emi_ce1n |
emi_ce0n |
emi_casn |
emi_rasn |
emi_cke |
timrot2 |
timrot1 |
i2c_sd |
i2c_scl |
pwm_4 |
pwm_3 |
pwm_2 |
pwm_1 |
pwm_0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 2 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 5 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
emi_wen |
emi_a14 |
emi_a13 |
gpmi_a12 |
gpmi_a11 |
emi_a10 |
emi_a08 |
emi_a08 |
emi_a07 |
emi_a06 |
emi_a05 |
emi_a04 |
emi_a03 |
emi_a02 |
emi_a01 |
emi_a00 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
gpio |
|
Bank 3 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
Mux Reg 6 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
emi_d15 |
emi_d14 |
emi_d13 |
emi_d12 |
emi_d11 |
emi_d10 |
emi_d9 |
emi_d8 |
emi_d7 |
emi_d6 |
emi_d5 |
emi_d4 |
emi_d3 |
emi_d2 |
emi_d1 |
emi_d0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
|
Bank 3 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
Mux Reg 7 |
31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
select = 0 |
|
|
|
|
|
|
|
|
|
|
emi_clkn |
emi_clk |
emi_dqs1 |
emi_dqs0 |
emi_dqm1 |
emi_dqm0 |
select = 1 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 2 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
select = 3 |
|
|
|
|
|
|
|
|
|
|
disabled |
disabled |
disabled |
disabled |
disabled |
disabled |
|
--
AmauryPouly - 06 Jul 2012
Copyright © by the contributing authors.