00:00:01 | LinusN | "DIOR- signal is the strobe signal asserted to read device registers or the Data port" |
00:01:20 | LinusN | and the timing diagram clearly shows that the idle state is high |
00:01:48 | LinusN | so the DIOR- signal goes low twice in a cycle, as far as i can see |
00:04:24 | amiconn | No, the signal does not go low twice in a cycle. As you say, the idle state is high, so you have to put it low before the first read cycle after an idle period. |
00:05:34 | amiconn | Otherwise you cannot start the cycle, because the cycle is started by the low->high transition (hm - that's means strobe) |
00:06:26 | amiconn | The cycle starts with this transition. The signal then has to stay high at least t2. After t2, the data is vaild. |
00:07:35 | LinusN | no, i believe the cycle starts earlier, since the device may very well negate IORDY before the rising edge of DIOR |
00:07:43 | * | [IDC]Dragon raises from the schematics |
00:08:01 | [IDC]Dragon | there's funny circuitry in there. |
00:08:02 | amiconn | Then you put the signal low for at least t2i. If after that you put it high again and the device is still selected, you immediately start the next cycle! |
00:08:27 | | Join midknight2k3 [0] (mk@AC9236E2.ipt.aol.com) |
00:08:41 | [IDC]Dragon | I wonder if the schematics are really correct here. What a job to find this out! |
00:08:43 | midknight2k3 | Linus woohoo |
00:08:51 | midknight2k3 | linus i've got a VU update for you |
00:09:09 | [IDC]Dragon | read and write go in loops, |
00:09:12 | midknight2k3 | hi idc |
00:09:16 | LinusN | amiconn: but the cycle time (t0) is measured between the two rising edges of DIOR |
00:09:21 | | Nick edx{off} is now known as edx (edx@pD9EAB899.dip.t-dialin.net) |
00:09:23 | | Quit edx () |
00:09:59 | [IDC]Dragon | there is also an enable for CS and addr derived from it |
00:10:02 | amiconn | LinusN: Yes t0 is called cycle time because the actual cycle is everything contained within it. |
00:10:35 | midknight2k3 | sorry to interrupt all, Linus, can I send it? |
00:10:47 | LinusN | and the address is changing on the second rising edge |
00:11:17 | LinusN | midknight2k3: use the patch tracker, i'm busy right now |
00:11:27 | midknight2k3 | OK |
00:12:25 | | Quit AciD` (Read error: 104 (Connection reset by peer)) |
00:12:27 | LinusN | amiconn: so the next cycle can't start with the second rising edge of DIOR, according to the diagram |
00:13:01 | LinusN | not if the address is supposed to be valid on all rising edges |
00:18:44 | amiconn | LinusN: I read it like that: If the address is valid at the time of the second rising edge of DIOR, another cycle starts, if not, it remains oin idle state. |
00:21:37 | LinusN | i found another timing diagram, from a Quantum data sheet: http://www.cnhdd.com/hdd/Quantum/SE/Chapter6.pdf |
00:21:38 | | Quit midknight2k3 (Read error: 104 (Connection reset by peer)) |
00:21:41 | amiconn | LinusN: This is supported by a simple calculation: The cycle time t0 for PIO4 as given in the table is 120 ns. PIO4 can transfer 16.6 MB/s. IDE is 16 bit -> 8.3 million transfers/sec -> cycle time is 120 ns. |
00:23:20 | | Join midknight2k3 [0] (mk@ACC6BBC2.ipt.aol.com) |
00:23:35 | midknight2k3 | aagh |
00:23:43 | LinusN | amiconn: i get it |
00:26:34 | [IDC]Dragon | amiconn: the quantum waveforms look different, more plausible: the polarity of DIOR is inverted |
00:27:09 | [IDC]Dragon | going low to sample the address, high for the data |
00:27:27 | amiconn | LinusN: agreed, the quantum diagram looks much clearer. |
00:27:50 | amiconn | Oops, meant [IDC]Dragon. |
00:28:41 | *** | Saving seen data "./dancer.seen" |
00:28:58 | amiconn | [IDC]Dragon: You did test my ATA loops and they are slower? Both for aligned and for misaligned data? |
00:29:06 | LinusN | the IORDY setup time worries me a little |
00:29:09 | [IDC]Dragon | yes, sorry. |
00:29:30 | [IDC]Dragon | amiconn: but your bitswap is 15% faster. |
00:31:13 | [IDC]Dragon | the ATA spec shows logic levels, not voltage levels! |
00:31:37 | LinusN | and? |
00:31:41 | [IDC]Dragon | see 3.2.8 |
00:31:44 | amiconn | [IDC]Dragon: Then this must have something to do with the ATA read not being an ordinary read, but I cannot imagine why this swaps the "speed order" of the routines. |
00:32:18 | elinenbe | some good discussion finally going on in the channel :) |
00:32:26 | LinusN | elinenbe: :-) |
00:32:37 | [IDC]Dragon | LinusN: signal line at the bottom postition means de-asserted, not low |
00:32:39 | midknight2k3 | it's being polluted |
00:32:45 | midknight2k3 | i think i need to butt in with |
00:32:48 | midknight2k3 | "hey nerds" |
00:32:51 | midknight2k3 | or |
00:32:54 | midknight2k3 | "eat me" |
00:32:55 | LinusN | [IDC]Dragon: i get it |
00:32:56 | midknight2k3 | or maybe not |
00:32:58 | [IDC]Dragon | hey troll |
00:33:06 | midknight2k3 | hey idc |
00:33:09 | midknight2k3 | i resent that |
00:33:44 | midknight2k3 | who's up for cleaner clock code WOOHOO |
00:34:10 | midknight2k3 | Linus: did you discover the boot harddrive bug yet? |
00:34:13 | [IDC]Dragon | LinusN: so the world is back in order, eath circling the sun, not vice versa |
00:34:20 | LinusN | ok, so that explains the long delay of the /WR signal |
00:34:36 | midknight2k3 | where it spins down on boot and takes a few extra seconds? |
00:35:14 | LinusN | midknight2k3: no |
00:35:24 | midknight2k3 | ever use your fm recorder? sheesh lol |
00:35:27 | midknight2k3 | or is it just mine |
00:35:37 | LinusN | it sure doesn't happen on mine |
00:35:44 | LinusN | but i haven't flashed it |
00:35:47 | midknight2k3 | humm odd |
00:35:53 | midknight2k3 | oh and now mine takes a hold of on to boot |
00:35:56 | midknight2k3 | may be flash related? |
00:36:06 | LinusN | could be |
00:36:17 | midknight2k3 | it spins down instantly |
00:36:30 | midknight2k3 | like someone called ata_sleep(0; right at boot |
00:36:34 | midknight2k3 | ()* |
00:36:48 | [IDC]Dragon | LinusN: so it looks like a normal bus cycle again. |
00:37:06 | [IDC]Dragon | I recommend that quantum datasheet, page 10. |
00:37:16 | [IDC]Dragon | More legible. |
00:37:25 | LinusN | yes, a normal cycle with some constraints |
00:37:53 | midknight2k3 | hmm, linus is it ok if i save the clock settings to .rockbox/.clock_settings? |
00:38:02 | [IDC]Dragon | We still have this funny 3 gata delay circuit. |
00:38:06 | [IDC]Dragon | 3 gate |
00:38:10 | midknight2k3 | you moved it to .rockbox/rocks/.clock_settings - just wondered why |
00:39:25 | LinusN | that circuit delays the RD/WR signal to match the delay through the data buffer |
00:39:53 | LinusN | but it delays the falling edge more than the rising, for some reason |
00:39:56 | [IDC]Dragon | For write, the fall edge is delayed one more than the rise. |
00:40:04 | | Join track [0] (~74d57721@ACB96BA4.ipt.aol.com) |
00:40:05 | LinusN | :-) |
00:40:16 | track | Hi |
00:40:17 | track | mid |
00:40:18 | track | linus |
00:40:25 | midknight2k3 | hi track |
00:40:27 | [IDC]Dragon | the read is delayed by 3 but tapped. |
00:40:34 | LinusN | my concern is the IORDY timing |
00:40:58 | track | hi linusn |
00:41:00 | [IDC]Dragon | the IDE_A_C comes out, which is the enable for the CS/Ax buffer |
00:41:03 | LinusN | in the quantum data sheet, tA is a min time |
00:41:06 | midknight2k3 | track, I'm starting on that clock update |
00:41:10 | track | cool |
00:41:12 | track | ;-) |
00:41:17 | midknight2k3 | i'll be sure to add in your remove second hand feature |
00:41:30 | [IDC]Dragon | but the buffer has to be enabled for write as well? |
00:41:53 | [IDC]Dragon | there must be a flaw in the schematic |
00:42:06 | track | mid I have another idea for the second hand |
00:42:13 | midknight2k3 | sure |
00:42:15 | midknight2k3 | shoot |
00:42:45 | track | instead of making it move every second, how about making it continious sweep as found on some clocks |
00:43:12 | LinusN | [IDC]Dragon: i think so too |
00:44:55 | [IDC]Dragon | why are you concerned about IORDY? |
00:46:02 | LinusN | because that is connected to the WAIT signal |
00:46:33 | [IDC]Dragon | looks like the right thing to do |
00:46:56 | LinusN | yes |
00:47:32 | LinusN | i'm trying to figure out why our optimized code fails on certain drives |
00:49:05 | [IDC]Dragon | I know... |
00:49:16 | LinusN | for instance, what happens if the ATA cycles come back to back? |
00:49:55 | LinusN | then the t2i time is not met |
00:51:12 | [IDC]Dragon | t2i = 25ns for PIO4 |
00:51:40 | LinusN | yes, but do we know how long RD stays high between accesses? |
00:51:52 | [IDC]Dragon | a single clock of ours is 90 ns |
00:52:46 | amiconn | LinusN: Even in my optimized code (which really should be fast :( ) the delay between 2 reads is 4 clock cycles even without WAIT, which equals 360 ns on the recorder. This should be long enough. |
00:53:57 | amiconn | s/delay/ shortest delay/ |
00:55:07 | LinusN | amiconn: remember that we have WARP mode enabled |
00:55:29 | LinusN | so the ATA and the IRAM accesses run in parallel |
00:56:17 | [IDC]Dragon | I think he already neglected the bus time for the write |
00:57:25 | [IDC]Dragon | How about waiting for your LA measurements? I see no progress here. |
00:57:40 | amiconn | LinusN: yes, but one instruciton needs at least one clock cycle. |
00:57:41 | | Quit track (Read error: 54 (Connection reset by peer)) |
00:58:53 | LinusN | i'm also waiting for results from Pedro |
00:59:16 | LinusN | my latest test disables WARP to see if there's any difference |
00:59:50 | LinusN | the SH data sheets are not clear about the warp mode |
00:59:57 | midknight2k3 | oops |
01:00 |
01:00:15 | [IDC]Dragon | to my understanding, it's a write buffer |
01:00:39 | LinusN | as i see it, the external access can go on for several instructions |
01:00:52 | [IDC]Dragon | so bus writes happen in parallel to the continued execution |
01:00:55 | LinusN | and the cpu only stalls when the data is needed |
01:01:19 | LinusN | but that may be a too complicated logic |
01:01:19 | [IDC]Dragon | write data is not needed |
01:01:40 | [IDC]Dragon | write is "fire and forget" |
01:02:18 | LinusN | the data sheets say nothing about writes, it says "accesses" |
01:02:49 | LinusN | or rather "some accesses" |
01:03:26 | LinusN | still, your interpretation seems very plausible |
01:04:25 | [IDC]Dragon | chapter 8.8 of the SH7032 datasheet talks about write cycles |
01:04:59 | LinusN | ah, now i see it |
01:06:10 | LinusN | (how did i miss that) |
01:06:23 | [IDC]Dragon | so in case of our ATA loop, the write to the DRAM is in parallel to the continued execution. |
01:06:47 | [IDC]Dragon | The read of the ATA register would be unaffected. |
01:07:08 | [IDC]Dragon | This means my pipeline optimization does not grip. |
01:07:25 | LinusN | grip? |
01:07:40 | [IDC]Dragon | Hmm, but the manual did mention something about pipeline stalls. |
01:08:05 | [IDC]Dragon | grip=bite, have effect |
01:08:11 | LinusN | back to square 1 |
01:08:36 | LinusN | anyways, we do have a problem with really slow drives |
01:09:48 | LinusN | one really lousy thing about the ATA command set is that there is no way to find out the current PIO mode |
01:10:07 | amiconn | [IDC]Dragon: Btw., what are the speed figures of my ATA loops versus yours? How did you measure? |
01:10:15 | LinusN | so i have no way of verifying that my set_features() hack works |
01:10:44 | [IDC]Dragon | amiconn; I have a plugin that loads a big piece of a file and times that |
01:12:18 | amiconn | [IDC]Dragon: could you send this plugin to me? |
01:13:02 | [IDC]Dragon | I loaded 5MB, this takes 2.46s/3.81s for my code, 3.60s/4.53s for yours, aligned/misaligned. |
01:13:11 | [IDC]Dragon | Sure I can send it. |
01:15:05 | amiconn | [IDC]Dragon: The figures read like you did not enable my code. It is not enabled by default because of the problems. Did you comment out the "#define PREFER_C" ? |
01:15:20 | [IDC]Dragon | Oops |
01:17:51 | LinusN | feedback from Pedro just came in: still problems |
01:18:11 | LinusN | kind of expected, now that i understand the warp mode better :-) |
01:19:12 | [IDC]Dragon | pipeline optimization is still a good thing, well, just because of the pipeline nature, independent from WARP |
01:19:30 | [IDC]Dragon | amiconn: better now |
01:20:14 | amiconn | [IDC] Dragon: what timings do you get now? |
01:20:46 | [IDC]Dragon | 2.09/2.52 for 5 MB |
01:22:31 | LinusN | nice indeed |
01:23:09 | [IDC]Dragon | +22% for aligned, 51% for misaligned |
01:23:18 | elinenbe | that is a huge improvement %wise. |
01:23:26 | [IDC]Dragon | misaligned is really substantial |
01:23:40 | elinenbe | amiconn: what are you up to next? :) |
01:23:43 | LinusN | amiconn and [IDC]Dragon: which HD model do you have? and what PIO timings? |
01:24:02 | [IDC]Dragon | I have a Fujitsu 60GB |
01:24:28 | elinenbe | actually has anyone seen the chinese patch that was mentioned on the mailing list in the past few days? |
01:24:40 | midknight2k3 | Linus: Can you BMP2RB something for me? |
01:24:51 | LinusN | pedro's disk has really sucky PIO timings |
01:24:51 | [IDC]Dragon | PIO4, 240/120ns |
01:24:52 | amiconn | [IDC]Dragon: This proves that there are WAIT for memory writes. Because I do word writes for misaliged data also (except the first one an d the last few bytes) I have half the waits. |
01:25:31 | amiconn | LinusN: I have the original IBM 20 GB |
01:25:42 | LinusN | amiconn: the DRAM doesn't use the WAIT signal |
01:25:44 | [IDC]Dragon | what are these timings, who tells? |
01:25:44 | midknight2k3 | anyone who can work bmp2rb? |
01:25:45 | amiconn | PIO4, 240/120ns |
01:26:17 | LinusN | midknight2k3: send it |
01:26:21 | midknight2k3 | woohoo |
01:26:33 | LinusN | [IDC]Dragon: the disk debug screen |
01:27:01 | [IDC]Dragon | no, I mean where does the info come from? |
01:27:19 | amiconn | LinusN: (WAIT) - yup, I was wrong. |
01:28:03 | LinusN | [IDC]Dragon: from the IDENTIFY DEVICE command |
01:29:27 | [IDC]Dragon | amiconn: about your code: you can always assume multiples of 512 bytes, no less |
01:30:09 | midknight2k3 | sent linus |
01:30:10 | midknight2k3 | thanks |
01:31:36 | amiconn | [IDC]Dragon: ok, then I could save some instructions, code will be shorter |
01:32:07 | amiconn | [IDC]Dragon]: but not measurably faster |
01:32:13 | [IDC]Dragon | it became pretty large, IRAM is precious |
01:33:03 | [IDC]Dragon | btw, LinusN, do you see a way to get parts of the C runtime into IRAM? |
01:33:18 | LinusN | to save IRAM, we can move out the descramble code |
01:33:35 | [IDC]Dragon | especially the "shift by n bits" subroutine |
01:33:36 | LinusN | which part of it? |
01:33:55 | LinusN | ah |
01:34:52 | LinusN | that is part of the gcc |
01:35:08 | [IDC]Dragon | I know |
01:35:19 | LinusN | it would probably take a gcc patch to pull that off |
01:35:57 | [IDC]Dragon | the whole CRT is quite small, is it possble to specify its location? |
01:36:15 | [IDC]Dragon | (just wondering) |
01:37:50 | [IDC]Dragon | I can also take some other code out of IRAM |
01:38:04 | midknight2k3 | OHHH |
01:38:08 | midknight2k3 | OHHHHH! |
01:38:10 | midknight2k3 | i mean |
01:38:11 | midknight2k3 | carry on |
01:38:14 | midknight2k3 | >:) |
01:38:28 | [IDC]Dragon | the old lcd_write() is still in, but does only control values by now |
01:38:31 | midknight2k3 | thanks linus! |
01:39:13 | [IDC]Dragon | it also has the unrolled bit loop, which is also not really needed any more. |
01:39:18 | midknight2k3 | wow really |
01:39:21 | midknight2k3 | must be a bug |
01:39:26 | midknight2k3 | i ALWAYS get bit depth errors |
01:39:28 | midknight2k3 | i knew it |
01:39:30 | midknight2k3 | i just knew it |
01:39:49 | midknight2k3 | hmm i'll have a look at it |
01:40:59 | LinusN | [IDC]Dragon: you should be able to load _ashiftrt.o in a different section |
01:41:13 | midknight2k3 | uh oh |
01:42:13 | [IDC]Dragon | OK. |
01:42:31 | [IDC]Dragon | One day I'll to a re-org of the IRAM ;) |
01:44:00 | LinusN | regarding the PIO timing issue, it seems like I am on to something |
01:44:14 | | Quit mecraw__ ("Trillian (http://www.ceruleanstudios.com)") |
01:44:21 | LinusN | if Pedro's reports are accurate |
01:45:34 | [IDC]Dragon | can you refine "something"? ;) |
01:48:04 | | Quit scott666 ("i'll be back...eventually...") |
01:48:56 | LinusN | well, it *looks* like my PIO4 mode hack works, but only until the drive spins down |
01:50:06 | LinusN | i may very well be wrong, though |
01:50:22 | LinusN | i wish i had his hard drive... |
01:51:46 | LinusN | his HD has a min access time of 400ns when IORDY is disabled |
01:52:45 | midknight2k3 | 400 nanoseconds?! |
01:53:13 | LinusN | the maximum cycle time we can achieve is 5 clocks |
01:54:13 | [IDC]Dragon | souns sufficient |
01:54:17 | [IDC]Dragon | sounds |
01:54:42 | [IDC]Dragon | amiconn: got the plugin? |
01:54:58 | midknight2k3 | linus, one more bmp2rb go? :D |
01:56:06 | amiconn | [IDC]Dragon: yes, thank you |
01:56:36 | [IDC]Dragon | it was originally meant for something else, testing the mp3 playback from a plugin |
01:56:59 | [IDC]Dragon | I only abused it because it loads a big chunk |
01:57:43 | midknight2k3 | Linus, sent. Thanks if you can |
02:00 |
02:01:04 | * | [IDC]Dragon needed to go to sleep like 2 hours ago |
02:01:10 | midknight2k3 | nite idc! |
02:01:18 | midknight2k3 | have fun with ATA crap whizzing around in your head |
02:01:39 | LinusN | [IDC]Dragon: me too! |
02:01:42 | amiconn | [IDC]Dragon: I just took out some check instructions from my ata loop. saves 20 bytes. |
02:01:53 | LinusN | good |
02:01:55 | midknight2k3 | "hmm if i give it 6 clocks i can enable the PIO4 mask and that will enable us to achieve 6MB/sec" |
02:02:00 | midknight2k3 | linus THANKLS |
02:02:04 | midknight2k3 | thanks* in caps |
02:02:23 | midknight2k3 | yay its cool |
02:02:25 | midknight2k3 | its clever logo |
02:02:30 | midknight2k3 | its like a clock in the O |
02:02:56 | midknight2k3 | ah last line |
02:02:57 | midknight2k3 | }; |
02:03:03 | midknight2k3 | looked like a sad winking face |
02:03:04 | midknight2k3 | LOL |
02:03:22 | [IDC]Dragon | goddnight! |
02:03:31 | midknight2k3 | goodnite! |
02:03:32 | [IDC]Dragon | goodnight, I mean |
02:03:38 | midknight2k3 | ata woohoo |
02:03:39 | midknight2k3 | go idc |
02:03:40 | midknight2k3 | and video |
02:03:41 | DBUG | Enqueued KICK midknight2k3 |
02:03:41 | midknight2k3 | and blit |
02:03:42 | midknight2k3 | and yay |
02:03:44 | midknight2k3 | and flash |
02:03:45 | midknight2k3 | and woohoo |
02:03:49 | | Quit [IDC]Dragon () |
02:03:52 | midknight2k3 | ah calming down now |
02:05:11 | midknight2k3 | wow out of like the past 15 lines its been all me talking except for 2 others and a quit msg |
02:05:17 | midknight2k3 | 2 other messages* |
02:06:16 | midknight2k3 | Linus: i purposefully made it 112x37 so i can nick the striping code woohoo |
02:06:20 | midknight2k3 | :) |
02:06:29 | LinusN | i'd better go to sleep too... |
02:06:35 | midknight2k3 | nite linus |
02:06:36 | midknight2k3 | thanks again |
02:06:40 | midknight2k3 | i should fix that bug |
02:06:48 | midknight2k3 | sleep good |
02:06:50 | LinusN | amiconn: nice talking to you |
02:07:29 | amiconn | LinusN: it was me a pleasure. |
02:07:34 | amiconn | Nite all. |
02:07:39 | | Quit amiconn ("Leaving") |
02:07:40 | midknight2k3 | nite linus,amiconn |
02:07:40 | LinusN | nite |
02:07:41 | midknight2k3 | aww |
02:07:46 | | Part LinusN |
02:07:49 | midknight2k3 | at least i can say nite linus |
02:07:50 | midknight2k3 | AWW |
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03:00 |
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05:33:02 | midknight2k3 | scotty |
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05:53:44 | sarah_h | I am new to this whole thing, can someone help me out with an Archos 5000 |
05:56:41 | dwihno | What is the issue? |
05:57:30 | sarah_h | This past week it just stopped functioning, when you actually press play to listen to a song, it hangs and won't turn off |
05:57:46 | sarah_h | I want to change the firmware on it, because your site seems like a solution to my problem |
05:57:56 | sarah_h | but i really don't understand how to go about doing this |
05:58:32 | dwihno | The installation is quite easy. You just place the firmware file in the root folder. |
05:58:41 | sarah_h | ok |
05:59:03 | sarah_h | what about the old files? or the mp3's currently on there. do i need to do anything special with those? |
05:59:11 | dwihno | no, not at all |
05:59:47 | sarah_h | thanks. I am going to try doing this...hopefully it will function correctly again when I am done. |
06:00 |
06:00:06 | dwihno | Just unzip the rockbox-2.1-player.zip archive to the root. |
06:00:09 | midknight2k3 | hi |
06:00:11 | midknight2k3 | dwinho |
06:00:13 | midknight2k3 | nice ui! |
06:00:14 | dwihno | \o/ |
06:00:21 | dwihno | Which part? |
06:00:27 | dwihno | The audio settings or the icon stuff? |
06:00:31 | sarah_h | ok thanks |
06:00:33 | midknight2k3 | both! |
06:00:39 | dwihno | thanks. |
06:00:47 | midknight2k3 | o |
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06:00:56 | midknight2k3 | o o |
06:00:58 | dwihno | I've thought about cleaning it up and submitting it for review, but I haven't had the time. |
06:00:59 | midknight2k3 | \_/ |
06:01:07 | midknight2k3 | is it updated at all? |
06:01:15 | midknight2k3 | you sent me a version about 2 months ago |
06:01:21 | midknight2k3 | no, i think it was a bit longer |
06:01:34 | dwihno | Sounds reasonable. I probably did it around christmas. |
06:01:50 | midknight2k3 | so it's unchanged? |
06:02:17 | dwihno | yes |
06:02:26 | midknight2k3 | noticed a few bugs |
06:02:33 | dwihno | You don't say? :) |
06:02:46 | midknight2k3 | i thought it was still WIP ;D |
06:03:02 | midknight2k3 | lemme boot it sec |
06:03:23 | midknight2k3 | ajbrecui.ajb |
06:03:24 | midknight2k3 | woohoo |
06:03:28 | midknight2k3 | ahh yay |
06:03:29 | midknight2k3 | its the icons |
06:03:56 | midknight2k3 | auto volume |
06:03:59 | midknight2k3 | its busted |
06:04:03 | midknight2k3 | the meter doesnt show right |
06:04:09 | dwihno | nahg |
06:04:11 | midknight2k3 | same for channels |
06:04:17 | midknight2k3 | not really meter type stuff |
06:04:27 | dwihno | It's not really WIP - more a proof of concept :) |
06:04:35 | midknight2k3 | and the bassboost scale is off (that is, up 10% fills it up all the way) |
06:04:36 | midknight2k3 | ohk |
06:04:37 | midknight2k3 | yay |
06:04:52 | midknight2k3 | and your menus are out of date |
06:04:56 | midknight2k3 | thanks a lot zagor :D |
06:05:06 | | Quit scott666 ("i'll be back...eventually...") |
06:05:21 | dwihno | The worst thing that happened was the move of the sound menu |
06:05:29 | midknight2k3 | ? |
06:05:31 | dwihno | Now the bookmark stuff is topmost (booo!) |
06:05:38 | midknight2k3 | suxors? :) |
06:06:04 | dwihno | Yeah, if I wasn't that goddamn lazy, I would compile my own binaries with my adjustments ;) |
06:06:25 | midknight2k3 | i hate doing that |
06:06:33 | midknight2k3 | merge it or drop it = my motto :) |
06:08:19 | dwihno | I don't know why the bookmark menu item was put FIRST in the list. |
06:08:38 | dwihno | I guess the guy who did the re-arrangements was a frequent bookmark user :) |
06:08:48 | midknight2k3 | yeah sucks |
06:08:52 | midknight2k3 | but |
06:08:55 | midknight2k3 | when you do your ui |
06:08:57 | midknight2k3 | it will rock |
06:08:58 | midknight2k3 | so thats that |
06:09:01 | midknight2k3 | period. :) |
06:09:07 | midknight2k3 | how large are the icons? |
06:09:11 | midknight2k3 | i can make you some |
06:09:15 | midknight2k3 | or pretend ot |
06:09:16 | midknight2k3 | to* |
06:09:43 | dwihno | Well |
06:09:48 | dwihno | I think they are 16x16 |
06:09:51 | dwihno | Or even smaller |
06:09:53 | dwihno | I don't know. |
06:09:55 | dwihno | Let me check |
06:09:58 | midknight2k3 | wow really |
06:09:59 | midknight2k3 | they look large |
06:11:06 | dwihno | yup |
06:11:07 | dwihno | 16x16 |
06:11:11 | dwihno | It was just a test |
06:11:19 | dwihno | They should be smaller, imho. |
06:11:24 | dwihno | 10x10 perhaps |
06:11:29 | midknight2k3 | they're nice |
06:11:31 | midknight2k3 | i can make you some |
06:11:41 | midknight2k3 | icons are my bag |
06:11:42 | midknight2k3 | i mean yeah |
06:12:14 | dwihno | If you started making icons I would feel obliged to continue my work :) |
06:13:26 | midknight2k3 | aww |
06:13:47 | dwihno | you should not spend any time before I actually make it happen. |
06:14:02 | midknight2k3 | i like making icons |
06:14:16 | midknight2k3 | ill make you a 10x10 pack and ... er.. give them to you next time i see you in a few months maybe |
06:14:24 | midknight2k3 | just for fun |
06:14:25 | midknight2k3 | deal? |
06:14:28 | midknight2k3 | :) |
06:15:18 | dwihno | hah |
06:15:20 | dwihno | well |
06:15:22 | dwihno | do so |
06:15:31 | midknight2k3 | yay |
06:15:37 | midknight2k3 | i was ordered to make icons by dwinho |
06:15:40 | Ctcp | Ignored 8 channel CTCP requests in 3 hours and 13 minutes at the last flood |
06:15:40 | * | midknight2k3 passes out |
06:18:31 | * | dwihno brings the medics |
06:18:52 | midknight2k3 | YAY |
06:18:57 | midknight2k3 | dwinho got *me* medics |
06:19:02 | midknight2k3 | *passes out dead this time* |
06:21:45 | dwihno | :-O |
06:21:50 | dwihno | Oh no! What have I done! |
06:22:25 | midknight2k3 | you've talked to me directly |
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06:55:08 | midknight2k3 | nite dwino |
06:55:11 | midknight2k3 | dwinho* sorry |
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11:30:50 | c0utta | late night linus ? |
11:35:57 | LinusN | yup |
11:36:04 | LinusN | yesterday |
11:36:25 | LinusN | it's 11:40am now |
11:36:30 | c0utta | i was watching from work :) |
11:36:56 | c0utta | unusual to see so much european activity |
11:37:07 | c0utta | usually only the americans online |
11:37:14 | LinusN | felt good to finally have some real tech talk in the channel, it doesn't happen that often nowadays |
11:38:48 | LinusN | well, dwihno, Hadaka, matsl, mbr and MT are european, afaik |
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11:39:56 | [1]c0utta | i suppose you've broken most of the technical barriers now |
11:40:21 | LinusN | well, we haven't solved the ata mystery yet |
11:42:39 | [1]c0utta | @#$% sourceforge - i've been trying to do an update for about 2 hours now |
11:45:55 | [1]c0utta | linus, can you verify http://cgi.ebay.com.au/ws/eBayISAPI.dll?ViewItem&item=3801101950 for me ? |
11:46:12 | [1]c0utta | is this an original recorder and not an fm or v2 ? |
11:46:23 | [1]c0utta | the packaging does not look familiar |
11:48:33 | LinusN | hard to tell |
11:48:53 | LinusN | as far as i know, the V2's don't come with a blue bag |
11:49:45 | [1]c0utta | i want an original recorder, but one with usb2. my recorder is getting flakey |
11:50:01 | [1]c0utta | i have soldered the pcb's but i think they're loose again |
11:50:30 | LinusN | then resolder again |
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11:51:32 | LinusN | they all have the same problem, so a new one isn't going to help you, especially not if he is selling it for 2 euro :-) |
11:51:51 | c0utta | i'm not very good with an iron. |
11:52:25 | c0utta | i just want a spare recorder because i think they're the best (or have the least problems) |
11:54:54 | c0utta | do you recommend this mod: http://rockbox.haxx.se/internals/archos3.jpg |
11:55:22 | c0utta | the joining of the terminals |
12:00 |
12:02:33 | LinusN | hmmm, i'm not sure if that helps or not |
12:02:59 | LinusN | that mod was done at the archos factory, btw |
12:03:55 | c0utta | oh, i thought zagor did it himself |
12:04:34 | c0utta | ok, i have updated to cvs and created my patch |
12:04:52 | c0utta | i have also allowed repeats on keys in quickscreens |
12:05:18 | dwihno | c0utta: what have you been up to? |
12:05:56 | c0utta | dwihno, integrating my NEWKEYS functionality gradually to the main source |
12:06:05 | dwihno | c0utta: "newkeys"? |
12:06:14 | c0utta | F2/F3 menus |
12:06:25 | c0utta | only F2 at the moment tho |
12:06:27 | dwihno | configurable screens? |
12:06:36 | c0utta | configurable menu items |
12:07:02 | c0utta | and settings too |
12:07:50 | c0utta | do you want your volume to be set to a particular value ? when i swap from headphones to car i do this quite a lot |
12:08:03 | c0utta | 50% for headphones, 88% for car |
12:08:15 | c0utta | these are both options in my own menu |
12:11:34 | LinusN | dwihno: http://rockbox.haxx.se/mail/archive/rockbox-archive-2003-08/0584.shtml |
12:12:13 | dwihno | aha |
12:12:23 | dwihno | Evilness \o/ :) |
12:12:42 | c0utta | linus, patch submitted |
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15:29:00 | Acoc | hello everyone |
15:29:21 | Acoc | I am looking for an upgrade to my hd in the 6000 |
15:30:10 | | Join Quelsaruk [0] (jirc@193.136.159.102) |
15:30:12 | Acoc | I'm pretty new to laptop hds so I saw there were lots of different interfaces |
15:30:43 | Quelsaruk | hi |
15:30:50 | Acoc | hello |
15:31:20 | Acoc | which interface (ATA(1-6),2.5",3.5") is used in the archos |
15:32:12 | | Join Ka__ [0] (~tkirk@65.216.194.2) |
15:32:45 | Quelsaruk | it's a 2.5" hdd... |
15:33:08 | Ka__ | hey all! |
15:33:23 | Quelsaruk | hi ka__ |
15:33:25 | Ka__ | anyone know the maker of the drives in the archos recorder 2.0? |
15:33:26 | Acoc | ok thanks, and does it matter about all these ATA numbers |
15:33:57 | Acoc | I know in the 6000 its Toshiba |
15:33:59 | Quelsaruk | AFAIK, no |
15:34:19 | Quelsaruk | ka__ there are several, toshiba, fujitsu, hitachi... |
15:35:02 | Ka__ | i have a archos on it's way to me and i want to pick up a larger drive for it before it gets here |
15:35:30 | Acoc | I'm here for the same reason but for the 6000 |
15:35:53 | Acoc | hopefully soon to be a 40000 |
15:36:21 | Quelsaruk | ka__ you should look specs to see which one is more silent and so on.. there are some threads on the mail list about hard disk drives.. you should also read them :) |
15:37:23 | Ka__ | i have access to an ibm 80 gig and wanted to make sure it was compatible.. i'm trying to locate a list if there is one. |
15:37:57 | Quelsaruk | i think that drive works |
15:38:55 | Ka__ | well i'm going give it a shot anyway.. won't hurt anything.. |
15:39:53 | Quelsaruk | remember.. that wil void the guaranty... try the box for at least 1 month or so before modding it, just in case it's not working ok. |
15:40:16 | Acoc | thats a good idea |
15:40:32 | Ka__ | well i'm getting this from ebay.. and i plan on voidign the warranty the day i get it anyway :) |
15:40:55 | Acoc | I know some of the solders inside were a little weak in mine |
15:41:05 | Acoc | so I had to go in and fix them |
15:41:31 | Acoc | the whole side with the usb port fell off lol |
15:41:32 | Quelsaruk | as you wish ka__ :) |
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15:41:56 | Ka__ | well i have a few mods already planned for mine.. including flashing rockbox on it :) |
15:41:58 | Acoc | but that was right after the warranty so just be careful |
15:42:25 | Alex | people, my jukebox 20 GB reads *Panic* Disk:NULL...I think it's power problems again! |
15:42:38 | Quelsaruk | Linus|away, i call you.. hear my cry :P |
15:42:52 | Quelsaruk | hmmm |
15:43:03 | Quelsaruk | Alex, batts are charged? |
15:44:11 | Alex | yup |
15:44:17 | Alex | fully chargex+d |
15:44:53 | Alex | and it doesnt get recognized by my computer...I think the power connections are poorely soldiered |
15:47:07 | Acoc | I was just saying that mine were and I had to resolder them |
15:47:15 | Alex | ok, was it hard? |
15:47:41 | Acoc | well for me it was obvious there was a problem |
15:47:53 | Acoc | when I took it apart the side fell off |
15:48:09 | Acoc | wasn't even attached anymore |
15:48:33 | Quelsaruk | sorry alex, i'm not a guru in these kind of issues. try asking afterwards to other, like LinusN |
15:48:45 | Acoc | as for how easy it was- the jukebox was my first soldering project |
15:48:46 | Alex | thanx guys |
15:49:12 | Acoc | four easy spots not next to circuitry |
15:49:20 | Acoc | make that 6 |
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15:50:33 | Acoc | cya later thanks for your help |
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16:14:34 | Alex | is Linus still away? |
16:15:11 | webmind | apearently ? |
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16:23:44 | * | dwihno gasps |
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17:56:14 | Quelsaruk | cu! |
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20:19:23 | photophreak | is anyone in here? |
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20:39:51 | LinusN|away | amiconn: hi |
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20:56:54 | amiconn | Hi LinusN |
20:57:00 | LinusN | yo man |
20:58:02 | LinusN | i'm suspecting that the IORDY->WAIT signal doesn't meet the timing requirements of the SH1 |
20:59:18 | LinusN | the WAIT is sampled on the rising edge of the second cycle in the access, shortly after CS is asserted |
20:59:57 | LinusN | so the ATA device doesn't have a lot of time to reply, especially since the CS and RD/WR signals are delayed |
21:00 |
21:00:16 | LinusN | and the SH1 expects a setup time of 40ns |
21:01:03 | LinusN | and a hold time of10ns |
21:01:18 | LinusN | (my space key is giving up on me) |
21:01:41 | amiconn | But why does this only influence the assembler code? |
21:02:18 | amiconn | I could imagine that it occurs because with the C code we are reading slow |
21:02:55 | amiconn | , but with the assembler code it is too fast, so the drive wants to use WAIT. |
21:03:28 | amiconn | But you did test the assembler code with additional waits (NOPs), didn't you? |
21:03:38 | LinusN | no,ihaven't |
21:04:27 | amiconn | Unfortunately, for the boxes that suffer from the ata problem, the "magic" limit is apparently 400 ns |
21:04:29 | LinusN | i don't even see the problem with my drive |
21:04:52 | LinusN | the scary part is that this 400ns hd was factory installed |
21:05:34 | amiconn | (Minimum PIO timing without using IORDY), but we can do either 360 ns, which is too fast, the next possible timing is 540 ns |
21:05:52 | LinusN | how much time is it between the accesses in your loop? |
21:07:11 | amiconn | because of instruction alignment. |
21:08:21 | amiconn | My loops are a bit "unbalanced". Both loops copy 3 words at a time. |
21:08:37 | LinusN | we have 90ns per cpu clock, the longest waitstate we can program is 5 clocks = 450ns |
21:09:42 | amiconn | The word-aligned loop reads are spaced 360 ns - 360 ns - 540 ns. |
21:09:44 | LinusN | but almost the entire first clock is wasted |
21:10:46 | amiconn | The misaligned loop reads are spaced 540 ns - 540 ns - 720 ns. |
21:11:18 | LinusN | in the current code, we have set it to only 2 clocks |
21:11:34 | LinusN | sowe should be "safe" anyway |
21:11:48 | LinusN | (regarding your timing analysis) |
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21:12:55 | LinusN | i wonder if this is causing the dreaded file corruption when recording that some people report |
21:12:55 | amiconn | (My timing figures calculated from instruction clock cycles without wait states) |
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21:13:54 | LinusN | regardless of our timing analysis, we still need to tweak the ata driver a little bit |
21:14:15 | LinusN | it must use the slower bus timing until it has enabled PIO4 |
21:14:29 | LinusN | because we don't know which mode the drive is in |
21:16:10 | amiconn | We should be on the safe side if we space the reads >= 600 ns (PIO 0 timing) until advanced modes are enabled. |
21:17:23 | LinusN | i think not |
21:17:27 | amiconn | As we cannot do exactly 600 ns, the next possibility is 720 ns (recorder) / 666 ns (player) |
21:17:52 | amiconn | Why do you think so? |
21:18:31 | LinusN | because the ATA address will be invalid when the SH1 ends the access, and the data bus will change |
21:19:01 | LinusN | and the sh1 ends the access earlier than 600ns, the best we can do is 450ns |
21:20:12 | LinusN | well, chance is that the ATA bus keeps the data "floating" when the buffer is disabled... |
21:20:29 | amiconn | But if this causes trouble with some drive, why does the C code work then? The bus read cycle should be identical, shouldn't it? |
21:20:42 | LinusN | that's what puzzles me |
21:20:54 | LinusN | my theory is this: |
21:21:20 | LinusN | the hd boots up in a fast PIO mode, with fast cycles |
21:22:01 | LinusN | but occasionally, when the code reads the FIFO very fast, it needs to halt using the IORDY pin, prolonging the cycle |
21:22:20 | LinusN | but the WAIT signal comes too late, and the CPU ignores it |
21:22:36 | LinusN | and performs a 120ns cycle anyway |
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21:23:05 | LinusN | and reads garbage from the data bus |
21:23:11 | LinusN | that's my theory |
21:24:06 | LinusN | my Hitachi drive timing is 120ns/120ns :-) |
21:25:09 | amiconn | The strange thing is: we do not even remotely reach 120 ns. The best we can do is 360 ns within the unrolled loop. |
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21:25:29 | amiconn | my IBM drive timing is 240ns/120ns |
21:25:53 | LinusN | no, no, forget about the inter-access timing, i'm talking about the bus cycle to the HD |
21:26:25 | LinusN | the SH1 cpu performs the ATA bus cycle in 120ns today, if WAIT isn't asserted |
21:26:27 | amiconn | and it does not suffer from the ata problems either. I even flashed rockbox with my loop compiled in. |
21:27:08 | LinusN | so the CS0 and CS1 are deasserted after 120ns |
21:27:41 | LinusN | or rather, the DIOR/DIOW signals |
21:28:30 | amiconn | But the bus cycle is identical between C and assembler since the very same instruction is used. |
21:29:12 | amiconn | If I understand you correctly, you cannot slow this down without modifying the hardware. |
21:29:18 | LinusN | yes, but my theory is that the hard drive needs some time between the accesses to keep up, else it will need to use IORDY |
21:29:39 | LinusN | and IORDY doesn't work, if my theory is correct |
21:31:00 | LinusN | and i'm afraid that even the longest programmable waitstate is too short for the 400ns drive, since the first and the last clock is "wasted" |
21:31:29 | LinusN | but the logic analyzer will probably shed some light on the matter |
21:31:45 | amiconn | If you theory is correct we should be safe if we don't go below the minimum cycle time without flow control |
21:31:47 | LinusN | still, i don't have a hard drive that is slow enough |
21:32:19 | LinusN | yes, but in the 400ns case, we simply can't do it |
21:32:35 | LinusN | we need to pace the accesses as well |
21:32:59 | LinusN | so we don't force it to use IORDY |
21:33:12 | LinusN | (i.e extend the cycle to 400ns) |
21:33:50 | LinusN | talk about wild quessing... |
21:33:56 | LinusN | guessing |
21:34:17 | amiconn | Again then - why does the C loop work? I really cannot imagine this if your theory is correct |
21:34:59 | amiconn | Btw: did you ask one of the people with "problematic" boxes which hard drive model they have? |
21:35:01 | LinusN | because the time between the accesses is long enough to let the drive settle between the accesses, preparing the next word to be read |
21:35:22 | LinusN | so it won't extend the cycle |
21:35:39 | LinusN | and the access is safely performed in 120ns |
21:35:52 | LinusN | no,i didn't ask |
21:36:49 | amiconn | Knowing the hard drive model should help to find such a slow thing for testing. |
21:37:01 | LinusN | yeah |
21:38:54 | LinusN | we should still be able to select which loop to use by reading the timing information |
21:38:59 | amiconn | Perhaps one of us should post a request for that info on the ml |
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21:42:09 | amiconn | Welcome back :-) |
21:42:12 | LinusN | hmmm |
21:42:19 | LinusN | shaky DSL |
21:43:04 | LinusN | i just posted a request on the ml |
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21:50:49 | amiconn | LinusN: As I'm atm fiddling with assembler anyway, I could prepare a less aggressively optimized version |
21:51:32 | amiconn | of the ata loop. This would be 720 ns for aligned, 810 ns for misaligned (calculated figures). |
21:51:58 | LinusN | how much is the C loop btw? |
21:52:11 | amiconn | With these you could prepare test builds to compare with my aggressive version. |
21:53:11 | amiconn | The C loops are 990ns/1170ns if I calculated correctly |
21:53:43 | LinusN | ok, go ahead |
21:54:38 | amiconn | Btw: there is a new "aggressive version" in the works which will be faster (only a few % this time), but not longer or even shorter (have to see) |
21:55:23 | amiconn | The new version will assume the word count to be a multiple of 4, so less conditionals in there. |
21:55:55 | LinusN | it will always be 256 words |
21:56:47 | amiconn | Or a multiple of it as we use READ_MULTIPLE? |
21:57:48 | LinusN | of course, silly me |
22:00 |
22:01:27 | amiconn | Starting to code.. |
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23:00 |
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23:11:11 | | Join Ka_ [0] (~tkirk@pcp261336pcs.howard01.md.comcast.net) |
23:14:08 | | Join midknight2k3 [0] (mk@ACD1FB5B.ipt.aol.com) |
23:14:23 | midknight2k3 | hi ppl |
23:15:51 | Ka_ | hey midknight2k3, i finally won a bit :) |
23:16:00 | midknight2k3 | YAY |
23:16:02 | midknight2k3 | hes a rockboxer |
23:16:08 | Ka_ | $180 for new in box recorder 2.0 |
23:16:20 | Ka_ | should be in the |
23:16:27 | midknight2k3 | woohoo |
23:16:28 | Ka_ | errr.. should be here in the next few days.. |
23:16:38 | Ka_ | then i can start ripping it apart :) |
23:16:42 | midknight2k3 | lol |
23:17:24 | Ka_ | midknight2k3: so where is the screen shot i was supposed to look at last night? :) |
23:17:40 | midknight2k3 | OH |
23:17:42 | midknight2k3 | i have it |
23:17:44 | midknight2k3 | its at |
23:17:50 | midknight2k3 | http://geocities.com/midknight2k3/clock.jpg |
23:17:52 | midknight2k3 | i believe |
23:18:02 | midknight2k3 | i pasted it on a billboard so it'd look very nice |
23:18:26 | midknight2k3 | now it says under it "Welcome to CLOCK.ROCK 2.0b" "Loading Settings..." |
23:18:45 | Ka_ | nice.. that's funny.. all of that for an 8 bit lcd displayed green scaled clock :) |
23:18:56 | midknight2k3 | its 1bit |
23:18:57 | midknight2k3 | btw |
23:19:03 | midknight2k3 | GREENSCALED HAAAAAHA |
23:19:05 | Ka_ | errr.. yeah 1 bit |
23:19:12 | midknight2k3 | but it does 8bit |
23:19:14 | midknight2k3 | movie player |
23:19:14 | midknight2k3 | woohoo |
23:19:23 | Ka_ | gettign used to my new happy hacking keyboard.,. |
23:19:28 | Ka_ | came in today!! :) |
23:19:39 | midknight2k3 | happy hacking keyboard? lol! |
23:19:50 | Ka_ | i haven't used a keyboard with this layout in so many years! |
23:19:57 | midknight2k3 | OMFG |
23:19:59 | midknight2k3 | i wanna see |
23:20:16 | midknight2k3 | is it like quick buttons on the top like "int" and "float" and "void" and "bool" etc? |
23:20:22 | midknight2k3 | press it and it inserts the text? |
23:20:31 | Ka_ | http://shop.store.yahoo.com/pfuca-store/ |
23:20:32 | midknight2k3 | and press a button like BeginComment and EndComment |
23:20:46 | Ka_ | not exactly |
23:21:12 | Ka_ | it's modeled after the old unix keyboards.. |
23:21:27 | midknight2k3 | thats GAY |
23:21:38 | midknight2k3 | and on the lower right its like "happy hacking!" |
23:21:42 | midknight2k3 | its so happy it makes me sick |
23:22:29 | Ka_ | well the one that i have the lite2 version doesn't have the words.. |
23:22:36 | midknight2k3 | is that your attempt at saving a few bucks on a keyboard? 'cos it's terrible |
23:22:48 | Ka_ | i guess have to be a unix/linux boy to understand |
23:22:57 | Ka_ | saving? |
23:22:59 | midknight2k3 | yeah "happy hacking" |
23:23:04 | midknight2k3 | thats unix all right |
23:23:06 | midknight2k3 | i cant decode that |
23:23:06 | Ka_ | the lite2 is $60 |
23:23:08 | midknight2k3 | i have no hopes |
23:23:11 | midknight2k3 | sixty? |
23:23:13 | midknight2k3 | what the hell |
23:23:19 | midknight2k3 | its a keyboard minus a capslock |
23:23:24 | Ka_ | the original −− the one you saw is $130 |
23:23:27 | midknight2k3 | get a $10 one and drill off the capslock key |
23:23:30 | Ka_ | it's a lot more than that |
23:23:41 | midknight2k3 | oh |
23:23:43 | midknight2k3 | really |
23:24:05 | Ka_ | yeah.. for starters the control key is moved to where it *should* be |
23:24:12 | Ka_ | so is the escape key |
23:24:37 | midknight2k3 | i see |
23:24:39 | Ka_ | also the keys are set up the way they are so your hands aren't moving all over the place |
23:24:40 | midknight2k3 | ctrl is up a key |
23:24:47 | midknight2k3 | and esc is down a key |
23:24:49 | Ka_ | they stay closer to the "home" [position |
23:24:51 | midknight2k3 | how worth $50 |
23:25:30 | Ka_ | for someone who spends a LOT of time typing it's worth every cent |
23:25:55 | midknight2k3 | its gay |
23:26:12 | Ka_ | even if you aren't used to the layout after you get used to it you can type a lot faster and with less stress on your wrists |
23:26:22 | midknight2k3 | sigh |
23:26:23 | midknight2k3 | syre |
23:26:24 | midknight2k3 | sure* |
23:29:08 | Ka_ | sooo let me guess something here.. you're a straight windows user right? |
23:29:16 | midknight2k3 | not really |
23:29:20 | midknight2k3 | mandrake setup never worked on this |
23:29:22 | midknight2k3 | pc* |
23:29:26 | midknight2k3 | so blah |
23:29:34 | midknight2k3 | i'll have to try redhat |
23:29:37 | midknight2k3 | even though i dislike it |
23:29:45 | Ka_ | so what DO you use? |
23:29:53 | midknight2k3 | xp right now |
23:30:04 | midknight2k3 | i wish i used OS X |
23:30:28 | Ka_ | so you're more of a mac user? or would like to be? |
23:30:34 | midknight2k3 | no, and yes |
23:30:42 | midknight2k3 | macs are nice imo |
23:30:45 | midknight2k3 | just gui-nice |
23:31:05 | Ka_ | ahhh well you're a GUI user.. which is what i was getting at.. |
23:31:10 | midknight2k3 | no |
23:31:17 | midknight2k3 | i like the gui of macs |
23:31:27 | midknight2k3 | but i've used linux and i prefer it |
23:32:06 | Ka_ | commandline or window manager? |
23:32:23 | midknight2k3 | i couldn't ever permanently migrate to linux, i'd miss 3ds max 6 and bryce 5 and vegas 4 |
23:32:31 | midknight2k3 | windows i like |
23:32:36 | midknight2k3 | cmd line would suck |
23:33:38 | Ka_ | so again.. you are a gui user.. which is why you don't understand the keyboard.. i've been using computers before there were graphical GUIs |
23:34:16 | Ka_ | and all you had was a command line and ascii based user interfaces.. everything was done by the keyboard and the mouse didn't next to nothing −− or just very little |
23:35:11 | midknight2k3 | uh |
23:35:15 | midknight2k3 | a "gui user"? |
23:35:28 | midknight2k3 | i think 99% of people, even linux nerds, prefer a gui |
23:35:39 | midknight2k3 | it doesnt have to be all mushy and slick |
23:35:45 | midknight2k3 | just a gui |
23:35:52 | midknight2k3 | openable/minimizable windows |
23:35:53 | midknight2k3 | etc |
23:35:54 | Ka_ | so some extent of course |
23:36:01 | midknight2k3 | a small extent is all |
23:36:10 | midknight2k3 | hardly a "gui user" lol |
23:36:35 | midknight2k3 | ok what does rockbox need.... |
23:37:10 | Ka_ | i'm talking about using a keyboard for 80%+ of the operations on a computer.. instead of a mouse |
23:37:58 | Ka_ | rockbox is actually a perfect example.. interfaces like that use only a pad of one form or another.. they don't need a mouse to operate |
23:38:14 | Ka_ | but i'm erally talking about using the keyboard to do most of your work. |
23:38:42 | midknight2k3 | ok |
23:38:43 | midknight2k3 | thats a gui user |
23:38:45 | Ka_ | when you rely on a keyboard to do most of your work and not the mouse you need a better keyboard |
23:38:48 | midknight2k3 | so basically everyone |
23:39:28 | Ka_ | ok.. replace GUI with mouse to make this clearer |
23:39:50 | midknight2k3 | yes ma'am |
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