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#rockbox log for 2013-04-17

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03:00:44soaplooking at the EQ / choppy scrolling thread.
03:01:03soapMight I safely assume a Q of 10 in the .cfg file is actually 1.0?
03:01:45soapor is Mr. Choppy Scrolling running 10x 1/7th octave filters?
03:02:00soapI told you this would happen, [Saint]!!!
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03:18:53saratogasoap: yeah its tenths, just like dB
03:19:00saratogashould probably mention that in the manual
03:19:46saratogathe appendix now is actually kind of wrong since it says the range is 1 to 64 in units of Q, when really its Q*10
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08:27:03wodzsaratoga: I think providing freq response graph in addition to eq parameters would help a lot. Where can I find the eq to calc freq response of the filter we use? *Maybe* i'll try to implement graphical feedback
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08:58:26wodzmortalis: Does the ru distributor have access to any other rk27xx documentation then main DS? RK27xx NAND Flash Controller.pdf comes to mind
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09:32:57mortaliswodz: ru distributor definitely don't have any docs, Monster Audio Technology Co ltd. (manufacture of ma9) may have it, but i expect they don't also
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11:19:34pamaurywodz (logs): up on archos 28 vision: hold is detected by adc channel 1 and sd detect by channel 2
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13:48:51pamaurywodz: I'm using a a Logic analyser, DCLK in PC2
13:51:11pamauryhum, not so clear, strange signal, maybe I made a mistake
13:51:59wodzpamaury: form disassm its pretty clear that PC5 is clk to xpt
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13:53:58wodz*from
13:55:32pamauryok, confirmed, PC5 is DLCK, PC2 is PENIRQ
13:56:56wodzwhats the freq of DCLK? 2MHz?
13:57:40pamaurydon't know, I'm simply toggling PCx and searching for the pin which changes on the pcb
13:57:50wodzpamaury: what is PC6? /CS?
13:58:06wodzah, I though you run OF and sniffed traffic
13:58:15pamaurydon't know, i'm looking at PC3 currently
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14:02:02pamauryPC4 is DIN
14:04:29***Saving seen data "./dancer.seen"
14:07:04pamauryhum, can't find a match for PC6 and for PC3. I could understand for PC3 because if it's the chip input, it could drives the pin low stronger than the SoC
14:15:17wodzpamaury: What is xpt's /CS state? (you uploaded rb bootloader to play a bit around).
14:15:33wodz*assuming you uploaded
14:18:10wodzpamaury: You also mentioned about problems with lcd display. Could you post photo?
14:21:10pamauryI have to leave, been back in an hour. I can't hook up the analyser properly because the pins are not so easy to reach. I need to do something about it
14:24:28wodzsolder kynar wires :-)
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16:31:06pamaury_wodz (logs): i'm beginning to think that CS is held low at all time
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16:39:06pamaurywodz (logs): the OF runs DCLK at ~300KHz
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16:58:49pamaurywodz (logs): if I try to read battery voltage using your code, I get a reading which is either 0 or 240, so something is at least partially working
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17:17:53pamaurywodz (logs): haha, spotted the error, this is wrong: MOSI_OUT(ctrl & i), this is right: MOSI_OUT(!!(ctrl & i))
17:23:12pamaurywith my own routine I get sensible reading, with your read8 one something is clearly wrong (x always 0), with read12 it seems ok but you values twice as mine. I think you forgot to take into acount the clock edge dury the busy time
17:23:37pamaurybattery reading is always 0 apparently, so it seems it is not wired
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21:30:02saratogaDoes anyone here know about frequency multipliers or PLLs?
21:31:35bertrikI know a bit
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23:08:08wodzpamaury: Yeah, I first implemented MOSI_OUT() as inline function and later changed my mind and turned it into macro without thinking about side effects :-) You are right also about clock edge during BUSY. Take whatever xpt function variant you prefer.
23:09:29wodzpamaury: Various sources point out that data should be 1) oversampled 2) smoothed to get reliable position
23:10:35pamaurysure
23:11:09wodzThe clock should be max 2MHz. last 3bits of control byte are used to settle voltage so since we do sw spi we could slow down clk for this three bits
23:12:24wodzpamaury: In which way lcd is distorted?
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23:24:05pamaurywodz: are to describe because it's dynamic garbage on the first two colums approx
23:24:07pamaury*hard
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23:26:24wodzyou mean 1-2px width?
23:26:49pamauryyes
23:26:59wodzhmm, might be timing then
23:29:04wodzpamaury: you can try to play with VERT_PERIOD value in lcdctrl_init() ( lcdif-rk27xx.c)
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23:53:27 Join lebellium [0] (~chatzilla@lns-c10k-ld-02-m-212-194-176-149.dsl.sta.abo.bbox.fr)

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