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#rockbox log for 2014-06-10

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04:19:30JdGordonsoap: you shoulda pinged me in here instead of trying in the forums :/
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07:35:57[Saint]8 core accounts is the apparent limit for quasselcore on a raspi if you want it to be tolerably responsive.
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09:53:34copperJohn, Woo?
09:54:10[Saint]Sorry - wrong channel. I'm far too excited about my minor accomplishment with an Arch image creation script.
09:54:32Neimaybe other programs would be more performant on a raspi;)
09:55:44[Saint]This is an STE Snowball.
09:56:11[Saint]1.2GH dual core, 1GB RAM, 8GB NAND, etc.
09:56:25[Saint](IOW: takes a fat shit on a raspi)
09:56:37[Saint]...but I digress, and this is off-topic.
09:57:55[Saint]I was playing around with a very similar setup on a raspi earlier, but, it just doesn't cut it compared to the Snowball.
09:58:02[Saint]anyhoo - topic.
10:01:44copperTopic's dead, baby, topic's dead.
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10:23:17[Saint]Who's motorcycle is this?
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11:28:37wodzZagor: are you going to be present in Warsaw?
11:29:37Zagorwodz: yes! I'm arriving with LO456 at 08:55 on saturday
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13:06:28fs-bluebotBuild Server message: New build round started. Revision bc37665, 253 builds, 31 clients.
13:10:07fs-bluebotBuild Server message: Build round completed after 221 seconds.
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16:37:52soapJdGordon, ping you? forums?
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17:48:09TheSevenpamaury: seems like you can't disable EP0 on this USB core (it will never signal completion)
17:48:28TheSeventhat caused a nasty lockup with the new driver
17:48:40TheSevenjust something to keep in mind in case we run into it again
17:48:48pamauryTheSeven: I fail to see the link between the two (disable EP0 and signal completion)
17:49:00pamauryah got it, it will never signal completion of disabling EP0
17:49:12TheSeventhat IRQ will never come
17:49:15pamaurybut I knews that already, I think it's written somewhere on some manuals
17:49:34pamauryat least it says the disable bit of EP0 is not implemented or something similar
17:50:27TheSevenyes, that was just something that I messed up while writing the glue to get the new driver compile inside rockbox
17:50:50pamaurynasty indeed, is it working now ?
17:51:15TheSevenwell, now the EP0 state machine panics for some reason
17:51:30 Join goa [0] (
17:51:37TheSevenbut it seems like what the driver is doing is correct, just the state machine seems to be confused somehow
17:51:44TheSevenlikely a rather highlevel bug that's easy to nail down
17:52:33TheSevenI can't really tell anything about whether this driver works better than the old one before we get to handle situations with concurrent TX traffic on multiple EPs
17:52:42TheSevenbut I'm hoping to get there within a few days now
17:52:50 Quit goa (Client Quit)
17:53:27TheSevensteffengy is currently looking into sorting this out as a little excercise to get into kernel-level development ;)
17:57:07pamauryit's quite possible the multi-traffic thing or bad fifo setup is really the killer
17:58:34*pamaury needs to go
17:59:44TheSevenpamaury: it's quite promising that I haven't seen anything that would point to multi-traffic problems on emcore or umsboot though, while the old umsboot (using rockbox's driver) definitely had trouble in that area
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18:00:32pamaurynow thinking about it, we might have the same problem on rk27xx iirc, it's a completely different core though
18:01:16TheSeventypical symptoms are lockups with HID activity during storage transfers, and failing to mount on windows (in many cases even without hid)
18:01:28TheSevenand dmesg messages about bus resets on linux
18:01:41pamauryon rk27xx if you spam EP0 while UMS is running, you can get to kill it
18:01:48pamauryat least that's what I remember
18:01:58pamaurybut there is no equivalent fifo setup
18:02:01TheSeventry spamming it with hid traffic, that's the easiest way to test
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22:51:03TheSevenhm, this EP0 state machine in usb-s3c6400x is broken beyond repair ;)
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22:52:26wodzTheSeven: Do I understand correctly that you are working on new usb driver for n2g/classic?
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22:53:20TheSevenwe're not quite sure what's broken with the old one, but it somehow doesn't work right
22:53:35wodzthat is something I know :-)
22:53:42TheSevenand as the one we use in emcore (which is completely different) seems to work much better, steffengy and me are porting it to rockbox
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22:54:26*wodz crosses fingers
22:54:46TheSeven(it was originally ported to emcore from some other project on a completely different SoC)
22:59:29wodzatj213x interrupt controller is strange. There seems to be no way to clear pending interrupt. I have stalled watchdog interrupt even if I mask this source and disable watchdog all together. If I don't service it the pending bit for watchdog is still present on the next irq.
23:00:02wodzreading pending interrupt register doesn't clear it, writing to it also
23:01:31TheSevenso that bit is completely stuck to 1?
23:02:14TheSevenmasking often doesn't affect the pending register, just controls which pending bits actually trigger a CPU-level IRQ
23:02:38TheSevenand disabling a peripheral doesn't necessarily clear any pending IRQs from that
23:03:02wodzyeah. That looks like this. But how am I supposed to clear pending interrupt then?
23:03:03TheSevenyou'll probably have to clear the IRQ at the source somehow, and possibly also clear it in the pending reg
23:03:34TheSevenas long as it's masked you just shouldn't need to care about it being set in the pending reg though, it shouldn't actually cause a CPU IRQ
23:03:43wodzYes, clearing at peripherial level is the last thing I didn't try yet
23:03:57TheSeventhat's usually required to make it disappear from the pending reg
23:06:07wodzit definitely doesn't cause 'irq storm' so it is not pushed to cpu level irq (or is pushed to the masked irq level - I didn't check)
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23:09:24bertrikI know that, in general, some interrupt bits can be edge-triggered and other level-triggered, if it's level-triggered you can't clear it unless you clear it at the source
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23:26:55TheSevenlooks like we're surviving enumeration now \o/
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23:46:26 Quit Strife89 (Ping timeout: 276 seconds)
23:50:22TheSevengevaerts: I've spotted some very suspiciously looking code in the USB core
23:51:15 Quit lebellium (Quit: ChatZilla [Firefox 30.0/20140605174243])
23:51:49TheSevenit seems like usb_core_control_request_handler reallocates all non-EP0 endpoints every time it's run, before the device has an address
23:51:56TheSevencan you explain the point of that?
23:52:32TheSevenIIUC this should be done on SET_CONFIGURATION requests
23:52:54TheSevenhm, I guess you need the EP numbers for the descriptors before that
23:53:55TheSevenbut I don't get why, if you're only doing this before SET_ADDRESS, you're redoing it on every request
23:54:10TheSevenprobably not broken, but it seems fishy somehow...
23:56:11*gevaerts tries to remember the order of operations here...
23:57:00TheSevenwhat happens on the bus is basically: RESET, GET_DEVICE_DESCRIPTOR, SET_ADDRESS, (move state to addressed), GET_CONFIGURATION_DESCRIPTOR, ..., SET_CONFIGURATION, (start using the endpoints)
23:57:07*gevaerts nods
23:57:16gevaertsSo it gets done twice
23:57:37TheSevenso that if usb_state == DEFAULT will happen on GET_DEVICE_DESCRIPTOR and SET_ADDRESS AFAICS
23:57:45gevaertsYes, that block could have a separate flag, or usb_state could get an extra state
23:57:58TheSevenor maybe this could just be moved into init
23:58:12gevaertsI'm trying to remember what happens on bus reset
23:58:42TheSevenI think this might have been implemented this way with dynamically changing configurations in mind
23:59:31TheSevenhm, then I really don't see a reason to not do this in init, as everything required by it should be constant (set of available endpoints, set of enabled drivers)

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