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#rockbox log for 2014-06-14

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02:18:54TheSevenhm, diagmode is doing some weird interaction with my LCD
02:19:29***Saving seen data "./dancer.seen"
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02:32:59TheSeventhe USB problem is in fact a cache coherency one
02:48:17TheSeven discard_dcache_range(ep0_buffer.raw, sizeof(ep0_buffer));
02:48:19jhMikeSkugel: missed it!
02:48:34TheSevenwhy isn't that sufficient to get rid of old cache content of that buffer?
02:48:40TheSevenit's cacheline aligned and everything
02:48:55TheSevenand IIRC the function ignores its args on v4T anyway
02:49:07TheSevenI'm not aware of anyone writing to that buffer
02:49:16TheSevenso it can't really be dirfty either....
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03:21:06TheSevenmy post mortem dumper is still alive?
03:21:14TheSevenI thought that was broken since ages
03:21:35TheSevennow that I'm messing with a broken USB stack it suddenly appears on the bus when rockbox paniced
03:22:43[Saint]It just called, to say, it loves you.
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04:47:45[Saint]I just purchased these:
04:48:32[Saint]I can strap a portable HDD, a bigass LiPo, and my portable amp to it.
04:48:45[Saint]New Lyre project. ;)
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10:32:07Zagor_phoneWodz: ping
10:33:06wodzZagor_phone: pong
10:33:34Zagor_phonePlease join #rockbox-community
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11:49:54TheSevencould it be even remotely possible that the cache coherency functions on nano2g (ARMv4T) are just broken?
11:53:52 Quit goom (Ping timeout: 264 seconds)
12:05:44pamauryTheSeven: don't you have a way of checking that ?
12:06:44*TheSeven has a feeling that discard_dcache_range uses functions that aren't available on this CPU
12:06:59ZagorWhat is the difference between Gain and Volume in the recording screen?
12:07:16Zagorthe manual is rather severly lacking for recording
12:08:31TheSeven mcrne p15, 0, r0, c7, c14, 1 @ Clean and invalidate line by MVA
12:08:47TheSevenbut ARM says in the 940T TRM that this is index/segment, not MVA
12:10:28TheSevenseems like ARM indeed changed that in an incompatible way between 940T and 926EJ-S
12:11:47pixelmaZagor: volume is just for the one listening (monitoring) I think. Gain for the actual recording level
12:12:00pamauryTheSeven: seems bad indeed ^^
12:12:10Zagorpixelma: thank you
12:12:27TheSeventhat's probably the reason why USB is broken on the nano since ages then.
12:12:44TheSevenI just wonder why the NAND/FTL code doesn't suffer from it
12:15:21TheSeven940T just doesn't support flushing by MVA at all, so you have to flush the whole cache in most cases
12:15:31TheSevenhowever they're using the same CP15 instructions for different things
12:19:41***Saving seen data "./dancer.seen"
12:29:08TheSevenyay, fixed :)
12:29:15TheSeventhis is going to be a fairly invasive patch though :)
12:29:49TheSevenbut at least we have working usb storage on nano2g and classic again :)
12:33:25pamauryTheSeven: great news
12:36:37pamauryTheSeven: isn't there a way to know the index by MVA ?
12:37:12TheSevenyou can only know the segment (in ARM terms)
12:37:33TheSevenso you could limit flushing to that segment
12:37:47TheSevenhowever there's only a performance benefit from that if you're flushing less than 64 bytes
12:37:56TheSevenotherwise you'd have to flush it all anyway
12:39:08wodzso how arm assumed to do cache coherency on that core?
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12:59:42TheSevenwodz (for the logs): By flushing the whole cache. It's only 4KB or something anyway.
13:00:05TheSevenpamaury: ^
13:00:23kugelTheSeven: wasn't the nano2g usb driver shared with sansa ams?
13:00:47TheSevenkugel: yes. My changes keep the old one for AMSv2 for now, but I see no reason why the new one couldn't be ported to those as well.
13:01:15TheSeven(the patch is still a bit messy, contains a few unrelated changes, and probably needs some cleanup)
13:01:22kugelwe've got a few samsas here so we could try to port
13:01:29TheSevenand I think there are some files/functions that are now unused and could be removed
13:01:48kugelI see tabs and //-style comments in that patch!
13:01:56TheSevenheh ;)
13:02:22TheSeven/ because it's coming from emCORE where we use them... but there shouldn't be tabs. hm...
13:02:54TheSevenkugel: to port it you basically have to implement this for your SoC
13:03:11TheSevenand some defines here:
13:04:07TheSevenUSB_ENDPOINTS is a bitmask (31 downto 0) of endpoint presence/usability: in(15 downto 0) & out(15 downto 0)
13:04:47TheSevenit's kinda surprising that the nano2g worked so well without working cache coherency ;)
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14:48:28copperfun protective sticker
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15:54:12powerage88does anyone here have commit access to the rockbox repository?
15:55:46pamaurypowerage88: yes
15:56:48powerage88pamaury: would you be willing to review for me?
15:57:48pamauryI'll see what I can do, but not right now
15:59:16powerage88pamaury: thanks. I'll add you as a reviewer.
16:00:44wodzTheSeven: ping
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16:19:44***Saving seen data "./dancer.seen"
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17:36:11TheSevenwodz: pong
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17:41:22wodzTheSeven: which patches do I need to apply to test new n2g driver?
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18:07:18kugelTheSeven: C bitfields should be avoided
18:08:18TheSevenwodz: just those three on gerrit
18:08:31TheSevenkugel: why that? feel free to reimplement it differently
18:08:57kugela) gcc generates horrible code and c) the order (within a byte) is undefined
18:09:16kugelthe next gcc version could be reversing the bit order
18:11:04TheSevenshouldn't matter for that
18:11:28TheSevenor wait, are we talking about the same thing?
18:11:42TheSevenhm... regs.h? there it might be a problem
18:12:15kugelthe bitorder is significant for hardware registers, but the order isn't guaranteed by the standard
18:19:47***No seen item changed, no save performed.
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18:57:41TheSevenkugel: is there a better way to do that, aside from the usual mess of (value << CONSTANT) | ...
18:58:21Zagor#defines is the usual way
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23:57:18pamauryI'll see what I can do, but not right now

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