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#rockbox log for 2014-11-06

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07:56:47fs-bluebotBuild Server message: 3New build round started. Revision df2ac74, 255 builds, 30 clients.
07:58:00wodzpamaury: (log) adfuload can now take -u|−−usb argument, it should also behave correctly when only s1 is provided.
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08:02:22fs-bluebotBuild Server message: 3Build round completed after 336 seconds.
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10:31:36fs-bluebotBuild Server message: 3New build round started. Revision bb5341c, 255 builds, 30 clients.
10:34:57pamaurywodz: thanks
10:35:23pamauryI have some changes in mind for the register description files:
10:35:32pamaury1) add register width
10:36:41fs-bluebotBuild Server message: 3Build round completed after 305 seconds.
10:37:40wodzpamaury: I did POC for disasm in hwstub_shell. It would be nice if either hwstub descriptor or desc file contains info about ISA and endianness
10:39:01pamauryhum, I think it would be best put in hwstub but we should think this through before choosing
10:40:12wodzI think hwstub would be better as you are not obliged to have desc file then. But from the other side once hwstub is ported to new SoC desc file will be written as well
10:40:31pamauryyeah good point
10:41:34pamauryalso I would 2) make the structure of the description more flexible, I have two possible ideas: 2a) make a tree where leaves are registers (like now) and nodes are containers which contain either more containers or registers. And like devices they can have several addresses/names (for copies). Or 2b) a bit like nouveau desc files: desc files are DAG (direct acyclic graph) so you can define registers and containers but not in a tree like fashion
10:41:34pamaury (I'll put example in a detailled proposal)
10:42:22pamauryalso 3) rework registers: drop the SCT flags and make it possible for registers to have several addresses with annotation, like +0 = REGISTER, +4=SET, +8=CLR, +C=TOG, +0x10=ALIAS, etc
10:44:49wodztree like is more natural IMO
10:45:31pamauryI agree, but in a few cases, this leads to duplication of information
10:45:40pamauryor weird structuring
10:46:05pamauryfor example if you have one kind of register which is found in several devices, you would have to write the description several times
10:46:26wodzis this case that common?
10:48:12pamauryanother example is for interrupt registers where you have one enable and one clear registers. Or when you have several groups of registers, like in portal player: controller{0-3}_sub{0-3}: those are copies of the same register, within each controller it's organiser with the same stride, but controllers addresses do not follow any pattern
10:49:47pamauryjust to be clear: it would still be a tree when viewed as a register map, it's only the internal description which would be a DAG to factor common description
10:51:13pamauryanyway, I need to think about it and write a POC or RFC, by the way did you put your POC somewhere ?
10:51:41wodzpamaury: well, considering 1) qeditor advances 2) We are the only two using this stuff I'd say switching to whatever internal format you consider is no issue
10:51:56wodzg#1030
10:51:59fs-bluebot3Gerrit review #1030 at http://gerrit.rockbox.org/r/1030 : 3hwstub_shell: Add dissasembling capability by Marcin Bukat
10:52:40pamauryadding ISA and endianess in hwstub would be quite trivial, just add another descriptor
10:55:17wodzThe only annoyance with capstone is that stable release is rather outdated.
10:56:47pamauryhum, I wonder why I introduced a HWSTUB_DT_DEVICE descriptor, it's empty :-/
10:59:05pamauryI'm thinking about a nasty detail: nowhere the hwstub doc says which is the endianess of the fields !
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11:00:06pamauryor more likely we implictely followed the USB spec which dictates everything should be little endian but clearly hwstub code and tools are not safe to use on big-endian targets/host
11:01:01pamaurywhat about arch details, for example ARMv6/v7/v7M ?
11:01:08wodzyes, I was thinking about the same thing yesterday
11:01:55wodzpamaury: imo it should be encoded in ISA directly as armv6 != armv4t both being arm
11:02:06pamaurymaybe we should have three fields: endianness, architecture, architecture details
11:02:24pamauryso armv6 = le, arm, v6
11:02:29wodzthis is also an option
11:03:02pamaurybecause it's useful to know it's ARM whatever the details of the arch are I think
11:04:18wodzwell if you have armv6 you know its ARM anyway
11:06:50pamauryyeah sure but that would mean that if code is only interested in the arch (say ARM vs MIPS), it will need to match all ARM subtargets
11:08:37wodzI don't understand
11:09:37pamauryanyway, gtg. For example the disassembler might not care which arm target it is, the fact it's arm is enough
11:12:18pamauryor maybe you're right
11:13:01pamaurydo you have any big-endian target in mind btw ?
11:14:22wodzpamaury: no. The only one which comes to my mind is coldfire but capstone doesn't support this ISA anyway.
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21:24:33[Saint]Oh. God.
21:24:38[Saint]What have I done...
21:25:06*[Saint] quietly closes the forum tab and pretends he didn't see it
21:27:32scorche|sho_O
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23:04:11hobrbutil still gives that http download error for creative x-fi3 bootloader
23:04:46hobthe prebuilt bootloader is based on an older version of OF which is ultra slow and buggy
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23:05:38hobfor building x-fi3 bootloader from the OF file*
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