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#rockbox log for 2016-02-25

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12:21:30JdGordon_my ipods hard drive disconnected today after a drop and i had a wierd bug I've never seen before and not sure how its even possible. all the file associations got nuked (nothing was showing up under the supported files view) but music still worked (via the database, which had to be initialiased)
12:27:11JdGordon_and usb mode doesnt seem to be working
12:30:52JdGordon_filesystem was (unsurprisingly) corrupt
12:31:01JdGordon_unzipped a new .rockbox and all is good again
12:53:44 Nick suYin`OFF is now known as suYin (
13:02:13 Join pamaury [0] (amauly@rockbox/developer/pamaury)
13:05:37wodzpamaury: have you looked at hwstub-atj usb driver I posted?
13:07:15pamaurywodz: yes but I didn't have time to study enough, I was ill the last two days
13:11:16 Join goom [0] (
13:24:12pamaurywodz: in ep0_write, I'm slightly concerned about this OTG_EP0CS = 0;
13:24:55pamauryit would be useful to know if it is really necessary and also if it's safe, because if the device finishes the transfer between OTG_IN0BC = xfer_size; and this line, bad things could happen
13:25:39pamauryin ep0_read, you want to handle the case of a short transfer
13:26:27pamauryie if xfer_size < MIN(max_pkt_size, endpoint->length) then the host will not transfer more data
13:27:08pamauryat this point you should set NACK (probably done automatically) and finish the transfer (which is thus incomplete and that's an error)
13:28:18***Saving seen data "./dancer.seen"
13:38:44wodzpamaury: OTG_EP0CS = 0 is not needed (it works without) BUT for bulk endpoints both ralink code and disasm of ATJ OF do that.
13:39:22wodzpamaury: and clearing bits in OTG_EP0CS seems need writing 1 into them
13:40:39wodzpamaury: NACK seems to be done automatically
13:41:36wodzpamaury: Is it possible to generate such erroneous transfers with libusb to stress test driver?
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14:24:21pamaurywodz: re erroneous transfers: I don't think so
14:24:58wodzpamaury: are you aware of any reasonable way to do that?
14:29:40pamauryit's one of those thing that will never happen in normal circumstances but we know that there always are unexpected situations, especially with usb
14:31:30wodzthat silly, how you test drivers then?
14:33:48gevaertsYou can get special hardware to generate custom packets
14:34:31gevaertsIt's not really libusb's fault, an EHCI (or any *HCI) controller just doesn't have an API to do wild things
14:35:25wodzgevaerts: sounds costly
14:35:34gevaertsIt probably is :)
14:35:46pamaurywodz: but it doesn't matter, the only thing which *really* matters is that you properly recover from a reset basically
14:36:02pamauryby properly cancelling all transfers
14:36:27wodzpamaury: is there a way to test it?
14:36:54pamaurylibusb will let you reset the device at any time I think
14:37:13pamauryotherwise try Windows, it does fancy things on init, including a reset in a middle of a transfer
14:38:16wodzpamaury: But to test driver correctness I'd need to reset device in the middle of transfer.
14:39:08pamauryyes, either use several threads or use the asynchronously API of libusb
14:39:20wodzah, I could use asynchronous api
14:39:40pamauryit's easier to interrupt very big transfers of course, because of the timing
14:39:58pamauryalso try to force full-speed, makes it easier
14:47:56gevaertsHmm, google tells me that people have done USB using GPIO bit banging on higher-end microcontrollers. If you have a bit of time, you can build a proper USB test rig without much of a budget :)
14:49:09wodzpamaury: reset forces enumeration, so do I assume correctly that 1) let device (let it be hwstub controlled) enumerate 2) Initiate big transfer asynchronously 3) reset device 4) check if it enumerated again
14:49:33pamaurywodz: correct
14:49:54pamauryactually it would way easier to check with a usb analyser but at least wireshark can give you some insight
14:50:20wodzgevaerts: for FS it is doable with not so highend MCUs as well. AVR can do HID all in software
14:51:15gevaertsHID tends to be LS, which will be easier
14:51:27wodzah, right
14:51:30pamaurymost devices don't do LS
14:51:39pamaurythey do either LS or FS/HS
14:51:47*gevaerts nods
14:51:48pamaurybecause it's a pain to support both
14:52:36gevaertsAlso, LS doesn't do bulk, so even if you could do LS, forcing LS reduces the number of errors you can actually test for
14:52:56pamaurythat would be an interesting projet to use a board with host capability and OHCI/EHCI and program it to stress our stack, see what happens
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15:03:33pamauryyeah usb analyzers are crazy expensive
15:11:31gevaertsI imagine a beaglebone might be a good board for this, with the PRU things
15:13:14pamauryyeah I wonder how far you could go with this
15:13:58pamauryit runs at 200MHz but it also depends on the I/O speed
15:16:42pamaurythe problem if you want a good usb analyzer stack is that you need the hardware and the software. Currently we have none, wireshark is far from enough
15:18:55wodzFrom my experience I/O speed is often limiting factor. I had project migrated from AVR to ARM just to figure out that this particular ARM chip can't handle gpio with required speeds.
15:19:32wodzAVR clock was 16MHz and ARM was 50MHz
15:21:06gevaerts says the PRU can do fast GPIO
15:21:20gevaertsFast enough for USB full speed anyway
15:24:03pamauryThe problem is HS, it runs at 480Mhz and you need oversampling
15:25:44pamaurythat's why most USB analyzers most likely use a USB transceiver
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15:31:06wodzThe proper way of doing this is in line with - FPGA + buffer ram + USB transceiver
15:31:34wodzbut thats a lot of work to design and write software for both sides
15:34:58pamauryyeah and openvizla didn't work out because the leader stole the money :(
15:35:24pamaurythey produced some boards but the project was not super successful
15:36:57pamauryI wonder if there exists some EHCI/OHCI with enough capabilities to build an analyzer (ie somehow get access to the transceiver)
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