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#rockbox log for 2016-02-27

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00:14:24***Saving seen data "./dancer.seen"
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00:54:12pamaurywodz (logs): with the fix, I can now read/write registers with ingenic boot rom. I can accept TSCM0 (the one of the CPU) using the weird 0xf400xxxx addresses. I can access TCSM1 and SRAM of the second CPU after enable AHB1 and corresponding AUX or SRAM clocks.
00:55:55pamaurystrangely, my probings shows the SRAM has size 16KB whereas the ingenic application note on JZ4760B says it should be 12KB...
00:56:26pamauryTCSM1 has indeed be reduced to 32KB
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23:41:06***Cleanup
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