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#rockbox log for 2021-03-31

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09:19:15speachy_bilgus_: saw the latest rev of the PP cache flush. talk about an expensive op!
09:20:57speachy(4K loop iterations to fully invalidate the cache....)
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09:31:49_bilgus_yeah thats odd that we were only doing like 1/2 I'm not sure the implications but it is no more or less crashy
09:33:41_bilgus_but that volatile is the key why, No F-ing idea. still alignment?? cache contention? https://pastebin.com/mGBtvL4y
09:34:34_bilgus_it is stable AF though code changes are not changinging it and I haven't seen a usb unplug data abort in the last 20x
09:39:16speachyhow often do we actually do a complete cache discard on these things?
09:39:26speachyhopefully not before every rx dma..
09:52:46_bilgus_it could be a mirror too I'll have to look tongiht
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10:02:41***Saving seen data "./dancer.seen"
10:20:54braewoodsthe samsung native players got some real usability issues
10:21:03braewoodsin terms of upgrades or so
10:21:19braewoodstheir choice of HDD interface has a tendency of disconnecting from the slightest movement
10:21:38braewoodsso getting it to recognize it reliably is a PITA
10:21:47braewoodsnot one i'd recommend to a new user
10:22:31braewoodsthe other units that use ribbon cables have a retention bracket
10:22:37braewoodsnot true here
10:22:39braewoodsbaffling
10:22:57braewoodsoh well
10:27:25braewoods_bilgus_: all i know about volatile is it forces the compiler to re-read a location instead of reusing a cached value
10:27:31braewoodsor so
10:27:37braewoodsdisables optimizations to a degree
10:28:06braewoodsit's most often used for special memory regions that can change outside of the knowledge of the compiler
10:28:37braewoodsbut no idea why it would matter here
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14:33:04_bilgushaha speachy its only 1024 status entries I just saw the 4k part its 4k / 4 bytes size of entry only 1k actual entries
14:37:52_bilgusand no not mirrored and it is the case in the original code as well AFAICT by 512x16/4
14:39:45_bilgusstepped by 4 bytes = 512
14:41:52speachythat sounds a lot more sane
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14:42:23speachy8k cache w/ 16-byte lines == 512 entries
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17:43:24_bilgusspeachy the only thing is that the other 512 entries have valid & changing data
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18:02:55***Saving seen data "./dancer.seen"
18:04:22_bilgus ah speachy I know whts going on here
18:04:33_bilgus8k cache for each core
18:05:09_bilgusso we need to look at the current owner and invalidate the proper one
18:06:42speachyugh, yeah, two caches, but.. are they accessible from each others' address space?
18:06:54speachyI suppose if they're on the AHB they must be
18:07:03_bilgusno clue but I assume so
18:07:43_bilgusso I sure hope its laid out as status 1 x 512 status 2 x 512
18:08:05speachywe could do a uniproc build and see which one is populated
18:08:29_bilgusboth set of lines have valid bits and changing data
18:08:57_bilgusoh you mean to see how its laid out
18:08:59_bilgusgot ya
18:09:02speachyyeah
18:09:13_bilgusfill it with junk and disable one core
18:09:39_bilgusok that'll take me a few any pointers how to lock out the core just while loop
18:09:49speachyIIRC in the one cpu case the second core is held in reset
18:23:57speachy...this could explain a lot of wonkiness..
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18:24:11speachyif we're not re-initializing the correct cpu's cache
18:27:26_bilgusexactly
18:30:52speachyour threading model doesn't guarantee a specific core will handle any given operation..
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18:49:36_bilgus#define FORCE_SINGLE_CORE
18:50:10_bilgusI should also do that with HEAD and see if it works properly
18:52:05speachyit worked when I was trying to debug the updated toolchain
18:52:19speachydon't see why it wouldn't now. :)
19:00
19:04:13_bilguslooks to me they go 512 512 but the second half is not totally clear
19:04:34_bilgusbut it has mostly the valid invalid bits..
19:04:58_bilgus1FFFF address..
19:07:28speachyso all of our cache code needs to care about IF_COP() or not.
19:08:27 Quit PimpiN8 (Quit: My MacBook has gone to sleep. ZZZzzz…)
19:26:47braewoods_bilgus: so it's some kind of race condition?
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21:31:31_bilgusbraewoods, It appears so
21:31:39_bilgusso far my POC works
21:32:23_bilgusnow to figure out how to integrate it into that IF_COP define
21:34:05_bilgusoh and test the cache data for mismatches
21:36:29_bilgusNow I really wonder why the ipods were fine
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21:56:32braewoodsbluebrother: got it finally
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23:30:18braewoods_bilgus: new mystery.
23:30:31braewoodsdevelopment rockbox doesn't work on the gigabeat S i bought from bluebrother
23:45:31braewoodsi'll look into in awhile
23:46:52_bilgusthe gigabeast was probably broken by the toolchain it has a lot of quirks IIRC
23:47:13_bilgusthis was an eventful week
23:47:34_bilgusthanks for sending me the h10 :P don't send more lol
23:49:58braewoodsi'll look into it
23:54:04braewoodsnot surprising we didn't get complaints about the gigabeat S
23:54:12braewoodsit's a very rare unit
23:54:33braewoodsin any case i'll try a build later
23:54:42braewoodsi just hate having to go backwards
23:54:49braewoodsit usually means making a whole new toolchain
23:55:03 Quit ac_laptop (Ping timeout: 268 seconds)
23:56:10_bilgusthats why vms are nice
23:56:22_bilgusassuming you ave enough space to store em
23:56:39braewoods_bilgus: indeed
23:56:49braewoodsi'll do a custom build of 3.15 and see if that works first of all
23:57:05braewoodsi think bluebrother wanted me to finish the gigabeat S port
23:57:16braewoodsfirst gotta get it booting again
23:57:22braewoodsi suspect more LCD breakage
23:57:37braewoodswe'll see
23:58:03braewoodsthis unit has no reset button but it has battery disconnect switch
23:58:05braewoodsso
23:58:07braewoodsclose enough
23:58:29braewoodsanywho time to order some parts to make this useable with what i got at home

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