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| 01:27:03 | braewoods | well this is good news |
| 01:27:15 | braewoods | the bootloader for gigabeats builds and works from current master |
| 01:27:31 | braewoods | i did a manual install to find out how the process works |
| 01:28:24 | braewoods | as i suspected though, beastpatcher works just fine with the 1.3 FW |
| 01:28:26 | braewoods | OF |
| 01:28:42 | braewoods | just wanted to confirm that it's compatible |
| 01:33:26 | braewoods | interesting |
| 01:33:37 | braewoods | dual boot actually works |
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| 01:54:10 | braewoods | huh.. |
| 01:55:08 | braewoods | speachy: i think i found a port specific minor bug. the rockbox UI appears to show a battery charging icon if USB connected... one problem though... |
| 01:55:23 | braewoods | the gigabeat S cannot charge from USB; it uses a separate barrel jack for that. |
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| 14:03:45 | mendel_munkis | are there any decimal points I need to consider besides "," and "."? |
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| 15:05:53 | desowin | I have working USB mass storage in Sansa Connect bootloader but not quite in the app |
| 15:06:12 | desowin | with the app however, I have trouble getting debugf/logf working |
| 15:06:46 | desowin | how am I supposed to enable it? when I select advanced in ../tools/configure it doesn't quite many any difference |
| 15:07:11 | desowin | HW should be capable of getting USB serial alongside MSC as it has enough bulk endpoints |
| 15:07:31 | desowin | but it looks like some issue with the build system that I cannot grasp |
| 15:07:41 | desowin | is the USB serial working on any other target with latest master? |
| 15:13:06 | desowin | hmm, I think I know what's going on... while I can read MSC, any write I do does not seem to make it to the disk, so I was just booting the same app |
| 15:16:15 | braewoods | mendel_munkis: no, there's no others used. you can read about libc localization to know more. |
| 15:17:59 | braewoods | mendel_munkis: but when it comes to number formatting i've only ever seen , and . used for separating thousands and decimal points |
| 15:18:09 | braewoods | but if you're talking about parsing... |
| 15:18:19 | braewoods | you'll have to figure out some way to distinguish it. |
| 15:18:48 | braewoods | in every parsed language though, i've only ever seen . supported for number decimal points. |
| 15:19:35 | braewoods | kinda makes sense though. if it varies with locale you're going to run into compiler problems. |
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| 15:20:31 | braewoods | desowin: i believe speachy told me that logf has to be enabled on a per file basis via a macro. |
| 15:20:38 | speachy | yep |
| 15:20:44 | speachy | #define LOGF_ENABLE |
| 15:20:57 | speachy | *before* logf.h is included |
| 15:21:12 | speachy | (which usually means at the very start of the file, as it can get picked up by another header) |
| 15:21:17 | braewoods | speachy: any insights into why rockbox still uses block comments where a C99 line comment will do? |
| 15:21:28 | braewoods | old code or? |
| 15:21:58 | speachy | lots of different authors and a lack of strict code style enforcement |
| 15:21:58 | braewoods | i find it easier to uncomment line comments and block comments :| |
| 15:22:04 | amachronic | desowin: to get USB serial working on Linux, I had to manually bind the USB IDs to a serial driver. But that prevented the mass storage from working so idk how you'd debug the mass storage that way. |
| 15:22:04 | braewoods | err |
| 15:22:06 | braewoods | than block |
| 15:22:27 | braewoods | amachronic: well they can use logf memory buffer |
| 15:22:44 | braewoods | but you gotta enable that first |
| 15:22:47 | speachy | also if you trigger a panic it'll show the most recent logf contents |
| 15:23:19 | braewoods | maybe the usb serial thing could be improved though |
| 15:23:29 | braewoods | ideally it'd show up as com port |
| 15:23:56 | braewoods | or a tty serial port |
| 15:24:11 | braewoods | i'll see if there's any generic thing we can emulate |
| 15:24:27 | braewoods | having it work OOB with hosts would be nice |
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| 15:29:32 | amachronic | well I managed to get the shanling q1's audio working, but I discovered something odd about the clock frequency. |
| 15:29:42 | amachronic | it appears they connected a 24.576 MHz oscillator to the DAC |
| 15:29:56 | amachronic | however the SoC works with a 24 MHz oscillator |
| 15:30:17 | amachronic | and I am wondering if the two are close enough that they are just using the 24.576 Mhz oscillator to drive the SoC. |
| 15:30:27 | speachy | what, a second xtal? not a clock driven by the SoC itself? |
| 15:30:48 | amachronic | no, I expect for cheapness they are using the 24.576 Mhz to drive the DAC and SoC. |
| 15:30:57 | amachronic | but I am ignorant of these things, so maybe that can't be done? |
| 15:31:13 | amachronic | (ie. can you wire one oscillator to two things like that?) |
| 15:31:24 | speachy | usually the DAC works with the clock derived from the audio data.. |
| 15:31:55 | speachy | it's possible to do that, but would be quite unusual without goign through a clock buffer first |
| 15:32:00 | amachronic | yeah I managed to make it work properly in i2s slave mode but it also works in i2s master mode, but with distorted frequencies. |
| 15:32:25 | amachronic | the DAC does have some internal PLLs or something. |
| 15:32:26 | speachy | what's teh DAC in that thing? |
| 15:32:30 | amachronic | es9218p |
| 15:33:08 | amachronic | easy to find datasheets online but I'm unsure of their provenance, or I would've linked them on the wiki |
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| 15:35:44 | speachy | most likely the same clock is driving both, or alternatively the SoC is driving a derived clock out. |
| 15:36:57 | speachy | that .56 difference is only 2.3%, so wouldn't be particularly noticable if the SoC is running slightly fast. |
| 15:37:47 | amachronic | yeah but I had some artifacts on the LCD due to a 5% clocking difference (48 mhz vs 50.4 mhz), so it appears it _can_ make a difference |
| 15:38:04 | speachy | there doesn't seem to be any particular requirement that the codec uses any given frequency though. |
| 15:38:16 | amachronic | anyhow I was just wondering if this was possible and if it is worth accounting for the difference base clock. |
| 15:38:20 | amachronic | *different |
| 15:40:32 | speachy | yeah, there's nothing special from the codec's perspective. up to the SoC to drive MCLK and set the divisor appropriately |
| 15:41:47 | speachy | I'd just find it quite odd if it was hard-wired to a 24.56MHz external XTAL, as that would likely limit the max frequency output of the codec |
| 15:42:53 | speachy | but similarly I don't think there's anything special about the X1000 with rspect to 24MHz input either, though it'll mess up the nice integer divisors typically used for (eg) USB. |
| 15:43:32 | speachy | how'd you derive that 24.576 MHz value? |
| 15:43:55 | amachronic | there's a way to read back the DPLL setting from the DAC |
| 15:44:06 | amachronic | it's related to the incoming audio clock |
| 15:44:12 | amachronic | and it's also related to the CLK input on the DAC |
| 15:44:24 | amachronic | so plugging in the numbers I got something close to 24.576 MHz... |
| 15:45:23 | amachronic | yeah it's called DPLL number on the datasheet. |
| 15:57:17 | mendel_munkis | braewoods: I know for sure that C uses , and . I seem to recall maybe having seen ' somewhere |
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| 16:00:06 | braewoods | mendel_munkis: really... i've only ever seen '.' used for actual numbers. |
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| 16:00:31 | braewoods | https://en.cppreference.com/w/cpp/language/floating_literal |
| 16:00:35 | braewoods | no mentions of , |
| 16:01:03 | braewoods | but ' can be used as a separator |
| 16:01:05 | braewoods | apparently |
| 16:01:07 | braewoods | TIL |
| 16:01:09 | speachy | ah, I see, the DPLL sort of locks onto the MCLK. |
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| 16:54:04 | amachronic | alright the mystery is solved, turns out I made a combination of foolish mistakes. |
| 16:54:35 | amachronic | somehow I got confused and use the bit clock instead of sample rate and that gives a result of 24.576 Mhz * 10, so I missed a 0. |
| 16:56:25 | amachronic | it appears the actual xtal input to the DAC is 38.4 Mhz. |
| 16:57:43 | amachronic | it sounds right when I base the calculations on 38.4 Mhz and put the DAC into i2s master mode. |
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| 19:25:15 | mendel_munkis | facepalm |
| 19:25:47 | mendel_munkis | I just realized that ignoring trailing zeros while accounting for length is a bad thing |
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| 22:13:43 | dconrad | so I may have got brave/stupid and opened up my Hifiwalker H2/erosq |
| 22:13:57 | dconrad | https://www.dropbox.com/s/63ww77dj3qp0dgj/erosq%20photos.zip?dl=0 |
| 22:14:31 | dconrad | interesting things: the DAC is a 5102A! So it's got all the modern bells and whistles |
| 22:18:46 | dconrad | And I only slightly broke the back plastic piece, but I can glue it back together I think |
| 22:22:23 | dconrad | And really the PCB design seems pretty well done |
| 22:26:21 | dconrad | processor is X1000 9016111602303-E |
| 22:33:05 | dconrad | what else can I look at/take pics of while it's apart? |
| 22:34:01 | dconrad | https://www.dropbox.com/s/63ww77dj3qp0dgj/erosq%20photos.zip?dl=1 to download the zip |
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| 23:34:40 | dconrad | I think I got all the markings of all ICs, though bummer the pins on the processor aren't accessible, I can't ohm anything out to it |
| 23:38:04 | braewoods | dconrad: isn't that usually the case today? |
| 23:38:31 | dconrad | well, yeah, but some part of me hoped |
| 23:55:56 | | Quit dconrad (Remote host closed the connection) |
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