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#rockbox log for 2021-08-10

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06:14:49bluebrother^ok, so I tried to build the manual. Fails because 332433eb3d9 changed \ifpdfoutput to \Ifpdfoutput −− what is that package? Couldn't find anything about \Ifpdfoutput, only \ifpdfoutput
06:41:33bluebrother^ok, found some info on it. It's been changed in KOMAscript. Debian buster ships 3.25, while this was changed in 3.28.
06:57:34speachyyeah, newer pdflatex needs the latter, older needs the former.
06:58:03speachyIIRC I committed that change when the server's version got updated to one that needed the latter syntax.
07:00
07:00:21bluebrother^too bad the commit message isn't really clear about that ...
07:00:52speachyit was discussed in IRC but yeah, I should have asked for a more verbose commit message.
07:00:52bluebrother^anyway, came across another issue: in the credits list at least one name is missing (the same I had issues with when looking into Sphinx)
07:01:06speachycharacter encoding issue?
07:01:10bluebrother^yes.
07:01:41bluebrother^with Sphinx I get lots of warnings from LaTeX about encoding, with our current setup I don't see any warnings. But looking into the pdf the name simply doesn't exist
07:02:57bluebrother^oh. Seems our credits.pl strips that, so no issue with LaTeX.
07:05:39bluebrother^yep, that's it. The first character isn't ASCII, so the regex doesn't match it. Turns out to also apply to some more names.
07:22:14rb-bluebotBuild Server message: New build round started. Revision 4fb5aeb096, 303 builds, 8 clients.
07:38:06rb-bluebotBuild Server message: Build round completed after 952 seconds.
07:38:07rb-bluebotBuild Server message: Revision 4fb5aeb096 result: 4 errors 0 warnings
07:39:25_bilgus_:/
07:40:36_bilgus_uh oh /home/rbbuild/x-tools/rockbox/lib/gcc/m68k-elf/4.9.4/../../../../m68k-elf/bin/ld: /home/rbbuild/rockbox/build-iaudiom5/rockbox.elf section `.stack' will not fit in region `IRAM'
07:41:12braewoods_bilgus_: what'd you chnage?
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07:42:49braewoodshm.
07:43:56_bilgus_its tight apparently
07:44:32braewoods_bilgus_: why'd you cast the void*? that's usually unneeded.
07:45:16braewoodshm.
07:45:33braewoodsso what changed? code size? stack size? both?
07:46:01braewoodsi'm leaning towards code size since the compiler is probably using registers
07:46:31_bilgus_yep its the same size but not..
07:47:01_bilgus_I've been checking asm and this is as close as I got
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07:47:19_bilgus_I'll try messing with the m5 direct
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07:47:55speachyyeah, the m5 has given us plenty of grief before
07:48:05braewoods_bilgus_: did you consider trying something a bit different?
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07:48:24braewoodshm
07:48:31braewoodsnevermind, probably wouldn't help
07:48:51_bilgus_a bit different ranged from 10-30 more instructions
07:49:11braewoodsi wonder what would happen if you tried changing the optimization level
07:49:17_bilgus_open to suggestions
07:49:22braewoodsi've sometimes found -O2 actually beats -Os in some cases
07:49:36speachy_bilgus_: IIRC the last time this happened we "fixed" it by shrinking the stack slightly.
07:49:36braewoodsbut that's probably a big hack on its own
07:49:45_bilgus_I can probably find 16 bytes
07:50:08_bilgus_if not they will start sharing code
07:50:18_bilgus_which maybe I should do
07:50:24_bilgus_anyway..
07:50:41braewoodsspeachy: sounds like most coldfire is a royal PITA.
07:50:56braewoodsspeachy: and only the iriver ones are common these days to find availablbe
07:51:18speachybraewoods: due to crappy caches we have to put critical code into IRAM if it has a hope of being performant
07:51:32braewoodsso IRAM is basically coldfire's fast ram
07:51:35speachyand the X5 has a bit more than most, due to its features
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07:52:04speachyIRAM is usually memory that's capable of running at full processor speed; ie no wait states
07:52:06speachyvs external RAM that's a lot slower
07:52:06braewoodsugh. net split.
07:52:22speachycaches hide that latency a lot
07:52:45braewoodsis that the main reason linked lists have turned into performance dogs today?
07:52:51braewoodsthey're not very cache friendly.
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07:53:18braewoodsat least on systems where cache misses are a serious issue
07:53:28speachythey don't scale up well, but all data structures are exercises in tradeoffs
07:53:42braewoodsindeed, i usually use arrays today where i can.
07:53:56_bilgus_woot
07:53:57speachyyou can't slice and dice elements into/out of arrays though
07:54:05braewoodsi know. it's a tradeoff.
07:54:16braewoodsspeachy: well, you can in sparse arrays. but yea.
07:54:28speachysparse arrays aren't exactly cache friendly either. :D
07:54:49braewoodsi know, mostly just convience of having a global lookup table of sorts you can access quickly
07:55:24braewoodsarrays of pointers are also problematic but they are good for quick rearrangement of data
07:55:38braewoodscost of copying is greatly reduced
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07:56:11speachywhen it comes to sorting... heh, entire academic careers have been based on optimizing that
07:57:00braewoodsi've sometimes concatenated a bunch of strings all into a contiguous memory region. used an array of pointers to manage access. this is only practical for read-only strings though.
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07:58:03braewoodsspeachy: correct me if i'm wrong but is the main reason memcpy is undefined for overlapping memory regions due to the fact that the copy mechanic is not defined?
07:58:10speachycorrect.
07:58:12braewoodsoptimization reasons basically.
07:58:22rb-bluebotBuild Server message: New build round started. Revision ee6b737b65, 303 builds, 8 clients.
07:59:21_bilgus_funny thing is I had done this with one of the patchsets but it didn't change the emitted code size so I figured the compiler out smarted me
08:00
08:00:58braewoodsi was considering using branchless versions of some operations in inflate but it occurs to me most of our targets don't have cpus sophisticated enough to benefit from branch elimination
08:01:02 Quit blbro[m] (Ping timeout: 256 seconds)
08:01:28_bilgus_when it gets like that I do stuff to view the asm
08:01:48braewoodsiirc, that would only benefit desktop builds.
08:02:06braewoodsdoes the ingenic x1000e even have a branch predictor?
08:02:12braewoodsour newest target to date
08:02:17braewoodsthat isn't a desktop system
08:02:20_bilgus_compiler explorer makes it more fun but just need to /home/bilgus/Desktop/RockboxDev/PLUGINFLAGS += -g -Wa,-adhln.txt
08:02:27_bilgus_compiler explorer makes it more fun but just need to /home/bilgus/Desktop/RockboxDev/PLUGINFLAGS += -g -Wa,-adhln
08:02:27speachycode compactness matters most; the more that fits in the instruction cache the better
08:02:46_bilgus_sorry its a file apparently
08:02:54_bilgus_lol
08:03:17_bilgus_I usually do arm bc i'm most familar with the instructions
08:03:31speachybraewoods: it's an 8-stage pipeline, so missed branches definitely hurt
08:03:56braewoodsspeachy: we could replace some macros with branchless alternatives. e.g., min/max
08:04:16_bilgus_dio it with ifdefs please
08:04:19braewoodsbut i don't know how helpful it'd be
08:04:30speachyit has a branch predictor
08:04:44braewoodsso eliminating branches we don't really need could help
08:04:57speachyI'm sure it could help, but how much vs the effort?
08:05:12braewoodsno idea. as it stands MIN/MAX branchless isn't that complex.
08:05:17speachyand if it makes the code larger, it might hurt more than it helps on less cache-heavy targets
08:05:30braewoodsi'll look into it later.
08:05:55braewoodsi suspect only targets with branch predictors benefit
08:06:48braewoodsit's a project for another time
08:07:03braewoodsbut some of the newer ports might benefit from this; i'd put these behind a branchless macro
08:07:13braewoodssomething we can enable for CPUs known to benefit
08:07:40***Saving seen data "./dancer.seen"
08:08:55braewoodsWhen did ARM gain branch prediction?
08:09:38speachyI think the ARM9xx series of processors
08:09:58braewoodsi suspect PP and ColdFire wouldn't benefit from this.
08:11:03rb-bluebotBuild Server message: Build round completed after 761 seconds.
08:11:05rb-bluebotBuild Server message: Revision ee6b737b65 result: All green
08:11:23speachyARM11 definitely had it, ARM9 maybe, but I don't think so now. ARM7 nope.
08:11:45speachycoldfire actually does have some branch rpediction
08:11:48braewoodsSo where do these fit in the armv4, etc, labels?
08:12:00speachyarmv4/v5/etc are the instruction sets
08:12:22braewoodsOh. Nothing to do with the actual ARM core.
08:12:37speachywhereas ARM7/9/11/etc are the implementations in silicon
08:13:03speachyARM7 implements armv4, ARM9 implements armv5, ARM11 implements armv6
08:13:35speachycortex-a* implements armv7 (newer ones are armv8 and now armv9)
08:14:34dconradwho on earth thought that was a good naming convention??
08:14:39speachycortex-m0/m0+ is armv6m (truly cut down!) but most cortex-ms are v7m. newest ones (just becoming generally available) are v8m.
08:14:52speachy"it seemed like a good idea at the time" :D
08:15:19speachyWhat's fun is that you could get the ARM ARM ARM
08:15:48speachyARM (the company) ARM (architecture) ARM ("architecture reference manual")
08:16:10speachyI think someone else managed to tack a fourth ARM on to that right around the time I left
08:16:17dconradat that point they're clearly just being jokers
08:16:58dconradthey need something thats the LEG, and maybe FOOT
08:17:16speachydconrad: but in all seriousness, that confusion is a big part of why they started calling using the "cortex-A/M/R" designation for the actual cores
08:17:27braewoodswhen AMD was toying with their dual architecture boards, i used to joke they could change their name to AAA now.
08:17:31braewoodsAMD, ATI, ARM
08:17:33braewoods:D
08:17:40speachydconrad: oh, it's been done (internally)
08:17:47dconradlol
08:18:05speachyone of the few external examples of that is the "thumb" instruction set.
08:18:26braewoodswhat was the point of those? reducing the size of instructions?
08:18:38speachyyeah, 16-bit vs 32-bit instruction size
08:18:43speachymakes your code a _lot_ more compact
08:18:57braewoodsare those still used on modern designs?
08:19:01speachyyou lose some performance (because you can't access as many general purpose registers)
08:19:15speachybut when you're memory/cache-constrained it can make a big difference
08:19:36_bilgus_only reason the clip+ fit..
08:19:44speachyoutside of the embedded (ARMxTDMI and Cortex-M) processors that require it, it's not used much.
08:19:46_bilgus_thumb
08:20:30braewoodsis it my imagination or does x86 have fewer GP registers than other architectures of its time did?
08:20:35speachyIIRC armv8 (ie 64-bit) did away with it, re-working the entire instruction set encoding
08:20:48speachyx86 was infamously register-constrained.
08:21:01braewoodsdoes 64 bit do enough to address that?
08:21:31braewoodsx86 was pretty late to the 64 bit party but arm was even later assuming my timelines are right
08:21:34speachyx86_64's main performance benefit was the expansion of the register file
08:21:43braewoodsmips64 existed (on paper) much earlier
08:22:05speachymips existed in silicon at least a decade before x86_64
08:22:11speachymips64, I mean
08:22:23braewoodsseems most of the mips implementors stick to 32 bit though
08:22:49bertrikI remember there being a lot of talks on arm64 at fosdem when that was a new thing
08:22:56braewoodsyou know what would be funny to see?
08:22:57speachythe R4000 PCU (MIPS III instruction set) was announced in 1991.
08:23:00braewoodsthe bogomips of a mips processor :D
08:23:42speachydue to larger integer and pointer sizes, unless your code needed to work with 64-bit stuff natively it was faster to stick with 32-bit code
08:24:01speachy(solely due to the larger memory footprint of 64-bit stuff)
08:24:16speachythe MIPS instruction set had 32 GPRs
08:24:21braewoodsonly performance powerhouses probably need 64 bits in general
08:24:49braewoodsthere's a few cases where 64 bits is helpful for supporting large files or so though.
08:25:14speachywhat typically happened is that the kernel was 64-bit, but most userspace was 32-bit
08:25:16braewoodsspeachy: isn't that part of why x32 was a thing?
08:25:22speachysame with sparc actually
08:25:46braewoodsit was a special amd64 ABI.
08:25:56speachybraewoods: yep, that's the idea behind x32. but it wasn't better enough than "normal" x86 to overcome the penalty of losing binary compatibility.
08:26:35braewoodsi actually had to correct people that dropping x32 didn't mean losing 32 bit x86 support.
08:26:38*braewoods facepalms.
08:27:09speachyx32 used 32-bit pointers but gained access to all of the other x86_64 improvments like the expanded register set and instructions
08:27:41braewoodsit also meant you couldn't memory map larger stuff
08:27:47braewoodsor similar
08:28:35braewoodsfor rockbox though there's little point to 64 bit since most of our main stuff wouldn't benefit
08:28:39speachyyeah, the larger address space was the real benefit, even in the 90s
08:29:19speachymade for far, far, far simpler code.
08:29:23braewoodswe can't handle files larger than 2GB anyway (assuming my code analysis is correct)
08:29:28braewoodssince our file offsets are signed
08:29:52braewoodsis that correct?
08:30:03speachythere's no reason we couldn't go to 64-bit file offset pointers tomorrow
08:30:21speachywe don't have to maintain binary compatibiltiy with anything else
08:30:29braewoodsthe only point would be supporting 4GB files on FAT32
08:30:45speachyyeah, but who's going to use a >2GB audio file? :)
08:30:55braewoodswhen i work on MTP, i plan to factor the size into my code.
08:30:57speachy(if we handled video that would be another matter...)
08:31:08braewoodsif they try to pass a value larger than our off_t can store, it'll be rejected.
08:31:34braewoodstechnically MTP only supports up to 32 bit unsigned stuff
08:31:37speachyuse size_t and offset_t in your code and it's trivially changed with a recompile later. (except of course the over-the-wire stuff, which is fixed)
08:31:41braewoodsno point in supporting the 64bit etensions
08:32:01braewoodssince our underlying FS can't handle it anyway
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08:32:30speachywhat would benefit us the most isn't 64-bit instruction sets, but rather SIMD/DSP stuff.
08:32:54braewoodsjust stating it does have some limits but it's a very short list.
08:32:55speachyenabling our codecs and other computtionally-heavy stuff to go much faster.
08:33:01braewoodsmainly time and file sizes.
08:33:06braewoodsfor our stuff.
08:33:08speachybut utilizng that effectively is a _lot_ of work
08:34:01braewoodsspeachy: a lot of port specific code.
08:34:02speachyheh, the ingenic parts we're using have a pretty rich SIMD engine that's arguably more powerful than the main mips core
08:34:55speachywell, not "port specific" so much as "processor architecture specific"
08:35:07braewoodsthe x1000e has a lot of potential for architecture specific optimizations
08:35:13braewoodssuch as branchless
08:35:32braewoodswhether they amount to anything is another question
08:35:33speachyhoestly that level of optimization will be a rounding error
08:35:58braewoodsat least my new workstation is nearly done
08:36:15braewoodsi was long overdue for an upgrade
08:36:18speachywhich is good if you're at the point where even rounding errors matter (eg a lot of what went into the PP code)
08:36:40braewoods64GB of ECC RAM, an 8 core APU
08:37:32speachythe single largest bang-for-buck optimization on our MIPS code would be to implement nested/preemptible interrupts.
08:38:41speachyI have some half-started code on that front but I think it would take a rework of our core threading/os code to actually be viable
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08:39:24speachythough It did occur to me that we might benefit now from ditching our custom OS in favor of (eg) FreeRTOS.
08:39:48braewoodsso we'd become an application?
08:40:26speachywell, we already are an application, albeit bolted to our own OS instead of someone else's.
08:41:12speachybut our OS interface is pretty much the same as every other RTOS; ie threads, mutexes, semaphores
08:42:12braewoodsspeachy: do you have any advice for IP cameras? seems like they're all stuck with proprietary firmware doing who knows what.
08:43:41speachythey're all more or less the same junk. so unless you want to roll your own (which will also be junk, just differently so) you're best off sticking to things that don't require cloud integration and have the physical features you need.
08:44:40braewoodsi thought so. i was hoping to find one that already had an openwrt port but no such luck.
08:44:46speachythere are several pure-FOSS surveillance systems out there that will work with any camera that supplies an RSTP feed
08:45:04braewoodsi know, but what i'm currently looking at is the actual cameras.
08:45:13braewoodsthe management system is a different story
08:45:40speachyyou could always just use an RPi with its native camera or with a USB-attached webcam or something
08:45:57braewoodscan you weather-proof that?
08:46:05braewoodsor custom case required?
08:46:07speachysure, but not cost-effectively vs just buying one already put together
08:46:29speachyespecially if you want things like PoE, IR LEDs, rotation control, etc etc
08:48:22braewoodswell to me what matters most is retaining software control
08:48:39braewoodsi don't trust proprietary stuff not to betray me so to speak
08:48:53braewoodsespecially since most of them require a network connection to do anything
08:49:27speachyeven if you take an untrusted camera, you can always firewall the crap out of it so it can only send data to your designated system(s).
08:53:24braewoodsspeachy: i see that. i'm just weighing my options for now.
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10:07:41***Saving seen data "./dancer.seen"
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10:43:18blbro[m]Tried to make the manual build with old and new versions of KOMAscript: g#3689
10:43:20rb-bluebotGerrit review #3689 at https://gerrit.rockbox.org/r/c/rockbox/+/3689 : manual: Add workaround for older KOMAscript versions. by Dominik Riebeling
10:44:08speachyseems sane
10:44:42blbro[m]cannot try with a newer installation right now, would be nice if someone could confirm this isn't breaking things :)
10:46:56speachyjust the regular 'make manual' ?
10:47:11speachyoof, big boom.
10:48:09speachyyeah, it's badly broken
10:49:30blbro[m]:/
10:49:43blbro[m]was half expecting that. It does work for me ...
10:50:00blbro[m]guess I need to give it another look later
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10:52:21bigman60yHello. Trying to use SonyNWDest Tool on a NW-A45 on a Windows10 PC and getting error: Cannot open device.
10:54:51blbro[m]speachy: is there anything hinting to why it goes boom? Wondering if that \ifdefined doesn't like the if clause to be empty.
10:55:34speachyre-running capturing the full output
10:56:38speachyblbro[m]: www.shaftnet.org/~pizza/boom.txt
10:58:52blbro[m]in preamble.tex, if you add \typeout(blah) before the \else, does that make a difference?
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11:22:00speachyblbro[m]: nopw
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15:04:53rb-bluebotBuild Server message: New build round started. Revision 614b189f7a, 303 builds, 9 clients.
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15:36:26braewoodsdmesg
15:36:27braewoodserr
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19:28:17dconrad g#3696 if anybody wants to take a look
19:28:19rb-bluebotGerrit review #3696 at https://gerrit.rockbox.org/r/c/rockbox/+/3696 : Eros Q Native: Make Mute logic channel-independent by Dana Conrad
19:28:36dconrada pretty simple patch for pretty basic oversight on my part haha
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21:36:33rb-bluebotBuild Server message: New build round started. Revision c9e9558044, 303 builds, 8 clients.
21:42:37speachynice, load average of 39. :D
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21:51:38rb-bluebotBuild Server message: Revision c9e9558044 result: All green
21:51:59_bilguswhat was the previous average?
21:54:34speachythat's was builder here
21:54:38speachymy builder here, I mean
21:54:56speachyit was already pushing 30 on an unrelated job prior to this build round
21:56:21_bilguscoverity doesn't do stdin processing apparently
21:56:25_bilgusError: compilation via stdin '-' unsupported. All other compilations will proceed as normal
22:00
22:01:58_bilgusall these safety bytes keep adding up
22:02:31_bilgusbeen trying to keep code increase minimal...
22:04:52speachyof course.
22:05:44speachydon't see any real alternative though; bad data can lead to all sorts of odd behavior
22:06:40speachy(I'm not too worried about outright crashes, and it's not like there can be any security implications, but let's not risk trashing random memory/stack...)
22:07:57***Saving seen data "./dancer.seen"
22:09:11_bilgusoh the number of real bugs found outweighs all the strife
22:10:33speachyif we have to we can drop-kick the 2MB targets. :)
22:10:41_bilgusnow we just need to wait and see what else we broke
22:11:01_bilgusall those assumptions
22:11:40_bilgusthere has to be even fewer
22:11:47_bilgusof the 2mb targets
22:15:54speachyonly the clipv1, m200v4, and c200v2
22:26:05speachycant' be too many of those left in working order
22:27:05speachyhave to say the server's definitely snappier with respect to post-round activities
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23:19:47_bilgusand for less power I presume
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