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#rockbox log for 2021-11-19

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08:20:13utishi
08:20:21utisany chance of support for cowon plenue D2 at some point?
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10:44:54smithjdis Gerrit taking review requests?
10:45:51smithjdI can't push a review request (permission denied)
10:47:25munkisreview request?
10:48:26smithjdyep.
10:49:55munkisyour revert pictureflow... commit has bilgus added as a reviewer.
10:52:07smithjdI have another set of changes to push.
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13:43:35tertudoes the xscale add anything useful to rockbox over m4k?
13:44:22tertuxburst, whoops
13:44:29speachywas kinda confused there
13:45:14speachyxburst is a sorta hybrid between MIPS32r1 and r2 (depending on which core we're talking about) but the various DSP/SIMD extensions (ie the real "xburst" stuff) is effectively unusable
13:45:28speachysupport for it never landed in mainline gcc
13:48:00speachyassuming that it had, we could in theory use that to build better-optimized variations of performance-critical code, but given that even teh slowest of teh xburst cores we support is faster than any of the non xburst cores, it's debatable if it's worth the effort.
13:48:22braewoodsspeachy: iow, only hand-coded ASM could be used?
13:48:33braewoodsor is this about something else
13:49:01speachybraewoods: actually we can't even use that, as there's no support for xburst in binutils (including the gnu assembler).
13:49:02braewoodsi've never used SIMD stuff so i don't know what determines when it'll be used
13:49:12braewoodsoh.
13:49:16braewoodswow.
13:49:27braewoodswe need toolchain support then before it's even an option.
13:49:55speachywe have full floating point on those targets already (ie standard MIPS FPU)
13:50:37speachybut we'd also presumably have to save/restore the xburst register file in our interrupt handler, which is already pretty bad latency-wise
13:51:11speachy(the high latency interupt handler is the only real problem with our mips implementation)
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14:02:58speachyso in the end, we're stuck with mips32r1, and the x1000 I think has the r2 instructions but lacks some of the other architectural features (eg the "new" global interrupt controller)
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14:39:25tertuoh, got it
14:42:51tertuyeah i was going to say, 1 ghz is way way faster than, eg, an ipod 4g
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15:14:19amachronicspeachy, something i forgot to mention yesterday −− I wonder if that post-DMA cache discard is applicable to the jz47xx series as well.
15:14:45speachypropbably...
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