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Subject: Re: Preliminary schematic

Re: Preliminary schematic

From: Paul Suade <>
Date: Sun, 9 Dec 2001 13:39:35 +0100

Good :)

What tool do you use to make this schematic ?

CS1: This _must_ be used with the DRAM, as this is the only way the SH-1 supports direct DRAM attachment (pg 142 datasheet).

 Both /CS1 and /CS3 (as stated in your shematic and datasheet) :).

CS0: I have a feeling that this is used to interface to the FLASH, but this would cause problems with the SH-1 spec, as this area should only be usable for either internal ROM only, or external ROM only - and they advise against switching on the fly. The other contenders for the CS of the FLASH at the moment are; CS2, CS4, & CS6. There is something interesting happening with the mode select pins too, but I will leave conjecturing until I have measured them.

Just a precision : /CS0 cannot be used if SH1 has a internal ROM, because it could need to access to external ROM for the firmware : if ARCHOS encrypt their software ARCHOS.MOD, why wouldn't they scramble their firmware in a external ROM ? If so, it means that program in A-MASKED ROM needs to access to external ROM to unscramble firmware in DRAM, so it is impossible to switch on the fly in fact. In other hand, SH1 may directly boot with a unscrambled firmware in the external ROM too. The best way to know is probably to check mode setting pins MD0-MD2 if SH1 boots with internal ROM.
CS2/CS4: I would guess that either of these are used for the LCD interface, which appears to be a standard 8 bit LCD Chip On Glass controller. Once I know the exact pinout, I should be able to guess at the exact chip used.

Could you confirm that LCD uses a 8-bit bus ? it would be nice if true :).
Received on 2001-12-09

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