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Subject: Updated schematic of AJB

Updated schematic of AJB

From: Andrew Jamieson <ajamiesn_at_mira.net>
Date: Thu, 13 Dec 2001 17:44:49 +1100

OK. Updated the schematic, and also managed to track down the LED controls ....

Green LED: This is controled from a static voltage net on the PCB, which is also routed to the Analog voltage input of the SH-1. Therefore this LED cannot be switched off, and is on when the unit is on.

Red LED: This is controlled via a NPN transistor driver connected to PB6 on the SH-1, which explains why is is dis-asserted on power-up. Setting this line high should turn the LED red.

LCD: The LCD is not connected to the data bus. Made the wrong call here, didn't I? The LCD seems to be controlled serialy, with physical connections to only four port pins (PA8, PB1, PB2, & PB3) which would tally nicely with the serial connection permitted by the SSD1815R1 controller used on the AJBR. Not content with screwing up once on this, I have made a guess as to what the lines would be used for .... If you look through the code, you might be able to tell me if I'm blowing smoke out of my ass again ;) The plethora of capacitors connected to the LCD makes me think it may be a SSD1815R1 controller (or similar) as well.

I2C to ISD: The I2C bus does not seem to be connected to the ISD chip. These pins on the ISD are pulled high, and seem to stop there - there may be a via under the chip that I am missing, but I can't find where they may connect to the I2C bus.

I also managed to confirm that the output of the latches (245s) does indeed go to the HD, so that is a fact now.

The updated schematic is attached.



Received on 2001-12-13

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