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Subject: recorder schematics (differences)

recorder schematics (differences)

From: Joachim Schiffer <>
Date: Sun, 16 Dec 2001 19:44:18 +0100

Hi again,

I am so excited about this project, that the warranty seal of
my AJBR had to go this morning, although there were some
months of warranty left ;)
My electronic-skills are not that good, but they are good
enough to trace the wires. So i traced some of the
connections, mainly around the display, the buttons and
the ide interface (to see, if there are any differences to
the player)
The display of the recorder is connected by 4 wires to the
CPU, like the one in the player, but it has 18 Pins, instead
of 21 and has more capacitors connected to it.
It is a SYT 0112064_30 (like mentioned before)

Connections in the Recorder:
Display -> CPU
1 -> 108 (PB3)
3 -> 107 (PB2)
4 -> 105 (PB1)
5 -> 103 (PB0)

All buttons except ON and OFF are connected to VCC at
the one side, and on the other side, they are connected to
two voltage dividers, which are connected to two analog-
inputs (AN4,AN5) of the CPU. So 4 Buttons are going to
one input. (it's a bit strange, but it works...)
I also noticed, that the CPU is connected to the Micronas
Chip using an 8 Bit Bus. I think it's for the MPEG Stream.
The Bits D0-D7 are connected to the MAS 3587F through
an extra 74245, which is triggered by PA0 of the CPU. The
dir-pin of the 245 is connected to MD2.
I also traced parts of the IDE Interface, and i found out,
that at least the databits of the CPU go the same way in the
recorder. The datalatches are also triggered by the same pins
as in the player. I think there are little differences in the
connections between IDE and the ISD200, but i'm not sure.
(there's something wrong with the connection
IDE Pin27 (IORDY) -> ISD200 Pin49)

Received on 2001-12-16

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