From: <Matthias.Klumpp_at_gmx.de>
Date: Mon, 21 Jun 2004 19:28:53 +0200 (MEST)

Hi Sophana (and of course all others),

please see my comments below.

Matthias

> ----- Original Message -----
> From: Sophana
>
>
> > Hi,
> >
> > I was just observing a strange behaviour of my JB Studio 20.
> > Let me explain, what I know and what happened:
> >
> > As I know the AJB's are operating with 3,3V.
> > As somebody from this list was telling me once, there is a pull up
> resistor
> > (R) inside the JB's remote pin.
> >
> > With my remote control I'm connected with a open collector
> transistor (T).
> > Let me try to make a schematic in ASCII art of that:
> >
> > 3.3V
> > |
> > |-|
> > | |R
> > |-|
> > |
> > +-----+
> > T |
> > |/C
> > --|\E
> > |
> > - GND
> >
> > T is a PNP BC557 transistor controlled by a Atmel uC.
>
> Open collector transistor must be a NPN! This cannot work.
> don't forget then the open collector scheme does invert the
> logic, which is not what you might want to.
> If your atmel output is an uart, it won't work.

Well, maybe you will not believe it, but it works perfectly in my
application.
If you do e.g. a PSPICE simulation, you will see - no problem.

Let me explain a little more about the details:
- The uC pin connected on the base of that transistor is the uC's UART TX
line.
- Signal on TX is low side switched like:
--+ +---------
  | |
  +--+
- The JB requires a serial signal like this and not inverted.
- If I would use a npn transistor, it would be inverted and the JB would not
understand that signal.
- To NOT have that invertation, I've choosen a pnp, because I can not change
the polarity inside the uC.
- The only handicap is, that a npn would switch to 0V, but the pnp switches
to 0,7V, if the base
  resistor is 1k.
- As my tests were showing no problems in serial comunication, I guess that
0,7V are sufficient for
  the JB's uC to recognize a low level.

Ok.
A double npn stage would be better (no inverted logic and low level = 0V),
but this pnp works also
and is one part less.

> If it is controlled by software, you don't need a transistor,
> you can just play with the tri state command. This is what I do with the
PIC.

Of course I could.
But I liked it more with a separated OC stage, that seemed more save to me
(lower risc of damaging the JB in case of any deffect in my circuit).
Maybe this is not really necessary, but also might not harm.

> > JB is not connected to power.
> > When the uC board is powered up, the JB also receives power by a relay
> > (power source is the Archos power adapter).
> >
> > What I was observing is the following:
> > - I'm powering my uC board and so also the JB.
> > - uC is setting the base of the transistor to high, so collector of PNP
transistor is floating.
> > - I'm measuring 3.3V at the JB's remote pin, so far so good.
> >
> > Normally the JB shows now "Charging".
> >
> > In that above described scenario, it is switching on the green LED, but
not
> > displaying any text. It then accepts no key presses any more. I do have
to
> > disconnect the power from the JB, press STOP and re-connect the power to
it.
> > Then ist also displays "Charging" and I can witch it on by pressing the
ON
> > key.
> >
> > If I do the same, but holding down the base of the transistor to low
level
> > by the uC (so remote pin is held down to 0V), the JB switches on the
green
> > lamp AND displays "Charging".
> >
> > Is anybody able to tell me the reason for that ?
> >
> I had almost the same behaviour. except that the archos does boot if there
> is a steady high level during boot.

Sorry to say, but in fact you did NOT have almost the same behaviour,
because your JB DID boot ;-))
Would you explain the similarity of your problem with mine to me ?

> I use 19200 bit/s and I must not send anything before the rockbox has
booted.

I'm running with 9600 Baud (JB Studio).
How is it possible to transmit with different Baud rates ?????

> I have a special routine which stop transmission until the archos boots.
> I think the archos won't boot if there is any framing error during boot.

Well, this sounds reasonable.
I measured, if there is any un-intended transmission, but there isn't.
In the circuit, that wasn't working, the OC pin was in steady high = 3.3V
state, when connected to tha JB.
No serial communication visible.

> > Another question is more HW basics related:
> >
> > Is there any difference in the following transistor circuits ?
> > What is the difference ?
> >
> > Open Collector (with PNP transistor):
> >
> > +-----to JB remote
> > T |
> > |/C
> > --|\E
> > |
> > - GND
> >
>
> this must be NPN, it does invert the logic and only drives
> the low level.
>
> >
> > Open Emitter (with PNP transistor):
> >
> > +-----to JB remote
> > T |
> > |/E
> > --|\C
> > |
> > - GND
> >
> this does use a PNP. It does not invert the logic, and is
> only needed if you want to sink high current.

Ok, I understood.
But I was asking about the difference in both circuits with PNP's.
Means, if I just swap emitter and collector.
In my PSPICE simulation, I don't see any difference.

> Note that you won't drive 0 totally because of the Vbe voltage around
0.7v.

Yes, that's the disadvantage, but works as described above.
I guess that the uC inside the JB recognizes the 0.7V correctly as low
level, because after the JB botted, there are no problems in serial
communication
at all.

> It won't be TTL compatible anymore because the TTL low
> voltage must be under 0.8v.

Ok, but we don't have TTL inside the JB.

> If you don't sink high current a simple diode would do the same.

How ?
If I imagine a Z-diode as level shifter I also do have 0,7V drop.

THX Sophana,
all of that is very interesting and was increasing my low knowledge of HW,
but it does not really answer my question, that is still:

Why do I have to apply 0,7V on the JB's remote pin to make it boot correctly
?


Greetings

Matthias

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Received on 2004-06-21