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Rockbox mail archiveSubject: Re: H3x0 ISP1362 (usbotg) chip connectionsRe: H3x0 ISP1362 (usbotg) chip connections
From: Kaggen <kaggen_at_gmail.com>
Date: Sun, 19 Feb 2006 06:01:34 +0100 Peter D'Hoye wrote: >Hi all (but mostly Linus), > >I'm having troubles accessing the isp1362 chip >in the H3x0. I've mapped its CS to 0x30000000 >and tried several options in CSCR3 (no success). > >I wonder about this: > >- MCF5249 users manual page 172, in table 10-9 > about the PS[1:0] CS select bit description > there is a note: "A0 is not available on the > external bus". If so, I wonder where A0 and A1 > of the isp1362 are connected to. > >- the isp1362 datasheet on page 49 (point 12.9) > talks about the powermanagement, and mentions > two pins that must be pulled low to enable > device and host part of the chip respectively. > So they are probably connected to the GPIO? > The two pins should be tied to vcc using a > resistor. Or I don't understand that part :( > >fyi, A0 is pin 61, A1 is pin 62 > > >shall I put the code I have so far somewhere? > >thnx, >Peter > > > > /* Disclaimer - it's 6.00am after a party */ Knowing the schematic can be a great deal of help, but I suppose it's a hassel to disect a player. A0 as far as the Coldfire is concerned is for byte addressing, on a 16bit bus, thus excluded. A0 on the ISP1362 should be for word addressing since it has a 16bit bus. Thus Coldfire <=> ISP1361 A1 <-> A0 A2 <-> A1 Which should make it transparent on the bus as 16-bit "memory". Though read/write is a hassle since the coldfire is R/!W while the ISP1362 has !R and !W signals. Presumably a solution like for the h300 LCD is used, thus an Address pin might be used as !R while R/!W is connected to !W. Hope this helps, now sleep. /Anders Received on 2006-02-19 Page template was last modified "Tue Sep 7 00:00:02 2021" The Rockbox Crew -- Privacy Policy |