- Status Closed
- Percent Complete
- Task Type Patches
- Category Drivers
- Assigned To No-one
- Operating System Another
- Severity Low
- Priority Very Low
- Reported Version Release 3.4
- Due in Version Undecided
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FS#11106 - Add test & clean cache coherency functions to mmu-arm.S
This patch adds some cache coherency functions to mmu-arm.S that only apply to the arm926ej-s core in the newer as3525v2 sansas. You can ask these cores to test the caches to see if they are dirty and use a loop to clean until there are no more dirty lines left in the cache. See page 2-23 of the ARM926EJ-S TRM for more info. There are versions of these functions present in the OF.
Closed by funman
2010-04-13 15:05
Reason for closing: Accepted
Additional comments about closing: Warning: Undefined array key "typography" in /home/rockbox/flyspray/plugins/dokuwiki/inc/parserutils.php on line 371 Warning: Undefined array key "camelcase" in /home/rockbox/flyspray/plugins/dokuwiki/inc/parserutils.php on line 407
2010-04-13 15:05
Reason for closing: Accepted
Additional comments about closing: Warning: Undefined array key "typography" in /home/rockbox/flyspray/plugins/dokuwiki/inc/parserutils.php on line 371 Warning: Undefined array key "camelcase" in /home/rockbox/flyspray/plugins/dokuwiki/inc/parserutils.php on line 407
r25628
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The at91sam9260, dm320, and tcc780x CPUs also are arm926-ejs
Aren’t these operations generic to ARMv5? The #ifdef should probably just test #if ARM_ARCH >= 5 ?
Are they related to the operations ARMv6 has?
(/me hasn’t looked at mmu-armv6.S, not at the mentioned datasheet)
My understanding was that these just applied to the 926ej-s and 1026ej-s but I have not really researched that aspect. I tested the test_clean_DCache() function by replacing the clean_dcache_range() in pcm-as3525.c. It appears to work just fine but I cannot claim it to work any better yet than what is used now. It is much easier to use though.
Attached patch replace invalidate_dcache and clean_dcache (alias cpucache_flush) for ARMv5
According to linux this works on all armv5tej
According to wikipedia all armv5 are TE, the J bit should have no influence
The ARM Architecture Reference Manual Issue E (v5T) doesn’t mention those functions.
The ARM Architecture Reference Manual Issue I (v6) does, but they are marked as optional.
Perhaps we should add a capability defined for CPUs which support it (like arm926ejs)
Add specific define for arm926ej-s
Correct functions for as3525(v1) : the cache is 2x smaller than arm920t used by gigabeatf/x and mini2440, so there is 1 less index bit
Tested on Clipv1
The arm920/arm922 caches are 64-way and the arm926 cache is 4-way so the index format obviously can’t work on arm926ej-s (it misses some cache sets)
Just needs testing on gigabeat F/X and/or mini2440
Sync to SVN
Use .rept gnu asm macro for indexed cleaning/invalidating