Rockbox

  • Status Closed
  • Percent Complete
    100%
  • Task Type Patches
  • Category LCD
  • Assigned To
    Andree Buschmann
  • Operating System iPod Nano 2G
  • Severity Low
  • Priority Very Low
  • Reported Version Release 3.7.1
  • Due in Version Undecided
  • Due Date Undecided
  • Votes
  • Private
Attached to Project: Rockbox
Opened by Andree Buschmann - 2010-12-11
Last edited by Andree Buschmann - 2010-12-21

FS#11807 - Major speed up of iPod nano 2G LCD

This patch implements some changes to the iPod nano 2G LCD driver.

1) Do not poll FIFO full state, but for FIFO half full state. FIFO size is 16 bytes. So, when FIFO is not half full it is possible to write up 8 bytes (= 4 pixels) at once. This reduces the number of polls by far.
2) Force “width” to even in lcd_update_rect() to allow writing 2 pixels per loop.
3) Write 4 pixels per loop when (width==LCD_WIDTH).

Speed up is ~50% for RGB and 25% for YUV.

Edit: My nano has a LDS176 type LCD.

Closed by  Andree Buschmann
2010-12-21 07:03
Reason for closing:  Accepted
Additional comments about closing:  

All patches committed with up to r28868

Andree Buschmann commented on 2010-12-11 17:12

Small update which further speeds up the LCD driver.

Andree Buschmann commented on 2010-12-11 23:48

Further speed up for RGB 1/4, YUV 1/1 and YUV 1/4. This patch version changes the LCD register bus width to 16 bit (using little endian).

Andree Buschmann commented on 2010-12-12 00:21

Unify DATA8 / DATA18 and CMD8 / CMD16 functions.

Andree Buschmann commented on 2010-12-12 14:10

Introduce asm code for YUV blitting. The asm code was adapted from the iPod Video code. The usage of registers can be further optimized (e.g. not handing over LCD_BASE as parameter.


svn


192 MHz
Main: 86.5 (1/1) 343.5 (1/4)
YUV : 64.0 (1/1) 254.5 (1/4)

48 MHz Main: 36.3 (1/1) 144.5 (1/4)
YUV : 22.5 (1/1) 90.0 (1/4)


patch v08


192 MHz Main: 129.5 (1/1) 516.0 (1/4) = 6,017,088 bytes/s (+50%)
YUV : 123.5 (1/1) 499.0 (1/4) = 2,869,152 pixel/s (+93%)

48 MHz Main: 64.5 (1/1) 258.0 (1/4) = 2,996,928 bytes/s (+78%)
YUV : 41.7 (1/1) 168.0 (1/4) = 968,774 pixel/s (+85%)

Andree Buschmann commented on 2010-12-12 15:36

v08 submitted with r28813. This task is kept open to track possible issues.

Andree Buschmann commented on 2010-12-13 07:41

After some experiments during an IRC chat with TheSeven I also changed the LCD_PHTIME register for the LDS-type display to 0×00. This results in a massive speedup of RGB full/quarter updates. As we now come closer to the memory bandwith I have added an asm function to write a single line to the LCD. To do this efficient the starting index must be even and the number of transfered pixels must be a multiple of 4.


patch v08 (against r28800)


192 MHz Main: 258.0 (1/1) 1029.5 (1/4) = 11,987,712 bytes/s (+198%)
YUV : 125.5 (1/1) 504.0 (1/4) = 2,915,616 pixel/s (+ 96%)

48 MHz Main: 129.0 (1/1) 514.0 (1/4) = 5,993,856 bytes/s (+252%)
YUV : 41.7 (1/1) 168.0 (1/4) = 968,774 pixel/s (+ 85%)

Andree Buschmann commented on 2010-12-13 20:04

Submitted with r28824 except setting LCD_PHTIME to 0×00. Patch v10 does this.

Andree Buschmann commented on 2010-12-19 21:30

Sync’ed against r28861 (tested for LDS and ILI type displays now). Speed is same for both LDS and ILI.

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