Index: bootloader/sansa_as3525.c =================================================================== --- bootloader/sansa_as3525.c (revision 20763) +++ bootloader/sansa_as3525.c (working copy) @@ -34,6 +34,7 @@ #include "disk.h" #include "panic.h" #include "power.h" +#include "mmu-arm.h" int show_logo(void); void main(void) @@ -43,7 +44,7 @@ void(*kernel_entry)(void); int ret; - system_init(); + system_init(); /* returns with mmu enabled & memory mapped*/ kernel_init(); #ifdef SANSA_C200V2 @@ -94,7 +95,7 @@ printf("Loading firmware"); loadbuffer = (unsigned char*)0x30000000; /* DRAM */ - buffer_size = (int)(loadbuffer + (MEM * 0x100000)); + buffer_size = (int)(DRAM_SIZE - TTB_SIZE); ret = load_firmware(loadbuffer, BOOTFILE, buffer_size); if(ret < 0) @@ -104,8 +105,9 @@ if (ret == EOK) { - kernel_entry = (void*) loadbuffer; + kernel_entry = (void*) 0x44; /* after copied vectors */ printf("Executing"); + cpucache_invalidate(); kernel_entry(); printf("ERR: Failed to boot"); } Index: tools/configure =================================================================== --- tools/configure (revision 20763) +++ tools/configure (working copy) @@ -259,7 +259,7 @@ arm9tdmicc () { prefixtools arm-elf- GCCOPTS="$CCOPTS -mcpu=arm9tdmi" - if test "$modelname" != "gigabeatf"; then + if test "$modelname" != "gigabeatf" && "$t_manufacturer" != "as3525"; then GCCOPTS="$GCCOPTS -mlong-calls" fi GCCOPTIMIZE="-fomit-frame-pointer" Index: apps/plugins/plugin.lds =================================================================== --- apps/plugins/plugin.lds (revision 20763) +++ apps/plugins/plugin.lds (working copy) @@ -1,4 +1,5 @@ #include "config.h" +#include "cpu.h" /* These output formats should be in the config-files */ @@ -47,10 +48,10 @@ #define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGIN_BUFFER_SIZE - CODEC_SIZE - LCD_BUFFER_SIZE - TTB_SIZE #elif CONFIG_CPU==AS3525 -#if MEMORYSIZE <= 2 -#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET +#ifdef AMS_LOWMEM +#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - TTB_SIZE) #else -#define DRAMSIZE (MEMORYSIZE * 0x100000) - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE +#define DRAMSIZE (DRAM_SIZE - PLUGIN_BUFFER_SIZE - STUBOFFSET - CODEC_SIZE - TTB_SIZE) #endif #endif @@ -110,15 +111,15 @@ #define IRAMSIZE 0 #elif CONFIG_CPU==AS3525 -#if MEMORYSIZE <= 2 +#define DRAMORIG DRAM_ORIG + STUBOFFSET +#ifdef AMS_LOWMEM #define IRAMSIZE 0 /* simulates no IRAM since codec is already entirely in IRAM */ -#define CODEC_ORIGIN (0x50000 - CODEC_SIZE) -#define PLUGIN_ORIGIN (DRAMORIG + DRAMSIZE) +#define CODEC_ORIGIN (IRAM_ORIG + IRAM_SIZE - CODEC_SIZE) +#define PLUGIN_ORIGIN (DRAM_ORIG + DRAMSIZE) #else -#define IRAMORIG 0x20000 -#define IRAMSIZE 0x30000 +#define IRAMORIG (IRAM_ORIG + 0x20000) +#define IRAMSIZE (IRAM_ORIG + IRAM_SIZE - IRAMORIG) #endif -#define DRAMORIG 0x30000000 #elif CONFIG_CPU == JZ4732 #define DRAMORIG 0x80004000 + STUBOFFSET Index: apps/plugins/test_disk.c =================================================================== --- apps/plugins/test_disk.c (revision 20763) +++ apps/plugins/test_disk.c (working copy) @@ -32,7 +32,7 @@ #if (CONFIG_STORAGE & STORAGE_MMC) #define TEST_SIZE (20*1024*1024) #else -#define TEST_SIZE (300*1024*1024) +#define TEST_SIZE (1*1024*1024) #endif #define TEST_TIME 10 /* in seconds */ Index: apps/plugins/SOURCES =================================================================== --- apps/plugins/SOURCES (revision 20763) +++ apps/plugins/SOURCES (working copy) @@ -164,3 +164,4 @@ #endif /* m:robe 500 */ md5sum.c +test_disk.c Index: firmware/export/as3525.h =================================================================== --- firmware/export/as3525.h (revision 20763) +++ firmware/export/as3525.h (working copy) @@ -22,11 +22,31 @@ #define UART_CHANNELS 1 + +#if MEMORYSIZE <= 2 +/* we put the codec buffer in IRAM */ +#define AMS_LOWMEM +#endif +/* these addresses are valid after mapping through the MMU */ +#define DRAM_ORIG 0x0 +#define IRAM_ORIG (DRAM_ORIG + DRAM_SIZE) +/* +#define IRAM_ORIG 0x10000000 +*/ + +#define DRAM_SIZE (MEMORYSIZE * 0x100000) +#define IRAM_SIZE 0x50000 + + /* AS352X only supports 512 Byte HW ECC */ #define ECCSIZE 512 #define ECCBYTES 3 +/* AS352X MMU Page Table Entries */ +#define TTB_SIZE 0x4000 /* Mimics OF */ +#define TTB_BASE_ADDR (0x30000000 + DRAM_SIZE - TTB_SIZE) + /* AS352X device base addresses */ Index: firmware/SOURCES =================================================================== --- firmware/SOURCES (revision 20763) +++ firmware/SOURCES (working copy) @@ -361,6 +361,7 @@ target/arm/as3525/usb-as3525.c target/arm/as3525/dma-pl081.c target/arm/as3525/ascodec-as3525.c +target/arm/mmu-arm.S #ifndef BOOTLOADER drivers/generic_i2c.c target/arm/adc-as3514.c Index: firmware/target/arm/mmu-arm.h =================================================================== --- firmware/target/arm/mmu-arm.h (revision 20763) +++ firmware/target/arm/mmu-arm.h (working copy) @@ -53,6 +53,14 @@ /* will do writeback */ void invalidate_idcache(void); +/* Enable ICache without MMU */ +void mmu_icache_only(void); + +/* Set bus speed relationships */ +void mmu_bus_fast(void); +void mmu_bus_sync(void); +void mmu_bus_async(void); + #define HAVE_CPUCACHE_INVALIDATE #define HAVE_CPUCACHE_FLUSH Index: firmware/target/arm/crt0.S =================================================================== --- firmware/target/arm/crt0.S (revision 20763) +++ firmware/target/arm/crt0.S (working copy) @@ -59,6 +59,7 @@ #if CONFIG_CPU==AS3525 && !defined(BOOTLOADER) +#if 0 /* relocate vectors */ mov r1, #0 @ destination ldr r2, =_vectorscopy @ source @@ -68,6 +69,7 @@ str r0, [r1], #4 cmp r1, r3 bne 1b +#endif /* Zero out IBSS */ ldr r2, =_iedata Index: firmware/target/arm/as3525/pcm-as3525.c =================================================================== --- firmware/target/arm/as3525/pcm-as3525.c (revision 20763) +++ firmware/target/arm/as3525/pcm-as3525.c (working copy) @@ -28,6 +28,7 @@ #include "panic.h" #include "as3514.h" #include "audiohw.h" +#include "mmu-arm.h" #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA * i.e. 32 bits at once (size of I2SO_DATA) @@ -69,6 +70,7 @@ CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE; CGU_AUDIO |= (1<<11); + clean_dcache_range((void*)addr, size); dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT, DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1, dma_callback); Index: firmware/target/arm/as3525/boot.lds =================================================================== --- firmware/target/arm/as3525/boot.lds (revision 20763) +++ firmware/target/arm/as3525/boot.lds (working copy) @@ -1,18 +1,22 @@ #include "config.h" +#include "cpu.h" ENTRY(start) OUTPUT_FORMAT(elf32-littlearm) OUTPUT_ARCH(arm) STARTUP(target/arm/crt0.o) -#define DRAMSIZE (MEMORYSIZE * 0x100000) +/* +No need for DRAM in our bootloader +#define DRAMSIZE (MEMORYSIZE * 0x100000) - TTB_SIZE #define DRAMORIG 0x30000000 -#define IRAMORIG 0 +*/ +#define IRAMORIG 0x81000000 #define IRAMSIZE 0x50000 MEMORY { - DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE + /*DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE*/ IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE } Index: firmware/target/arm/as3525/dma-pl081.c =================================================================== --- firmware/target/arm/as3525/dma-pl081.c (revision 20763) +++ firmware/target/arm/as3525/dma-pl081.c (working copy) @@ -20,7 +20,7 @@ ****************************************************************************/ #include -#include "as3525.h" +#include "cpu.h" #include "pl081.h" #include "dma-target.h" #include "panic.h" @@ -63,6 +63,21 @@ { dma_callback[channel] = callback; +#ifndef BOOTLOADER /* && !defined(MMU_IN_BOOTLOADER) /!\ */ + /* use physical addresses for DMA */ + if((unsigned long)dst < (DRAM_SIZE)) /* SDRAM */ + dst += 0x30000000; + else if((unsigned long)dst >= IRAM_ORIG && + (unsigned long)dst < (IRAM_ORIG + IRAM_SIZE)) /* IRAM */ + dst += (0x81000000 - IRAM_ORIG); + + if((unsigned long)src < DRAM_SIZE) /* SDRAM */ + src += 0x30000000; + else if((unsigned long)src >= IRAM_ORIG && + (unsigned long)src < (IRAM_ORIG + IRAM_SIZE)) /* IRAM */ + src += (0x81000000 - IRAM_ORIG); +#endif + int control = 0; DMAC_CH_SRC_ADDR(channel) = (int)src; Index: firmware/target/arm/as3525/system-as3525.c =================================================================== --- firmware/target/arm/as3525/system-as3525.c (revision 20763) +++ firmware/target/arm/as3525/system-as3525.c (working copy) @@ -28,6 +28,7 @@ #include "clock-target.h" #include "fmradio_i2c.h" #include "button-target.h" +#include "mmu-arm.h" #define default_interrupt(name) \ extern __attribute__((weak,alias("UIRQ"))) void name (void) @@ -229,11 +230,7 @@ CGU_PROC = 0; /* fclk 24 MHz */ CGU_PERI &= ~0x7f; /* pclk 24 MHz */ - asm volatile( - "mrc p15, 0, r0, c1, c0 \n" - "orr r0, r0, #0xC0000000 \n" /* asynchronous clocking */ - "mcr p15, 0, r0, c1, c0 \n" - : : : "r0" ); + mmu_bus_async(); CGU_PLLA = AS3525_PLLA_SETTING; while(!(CGU_INTCTRL & (1<<0))); /* wait until PLLA is locked */ @@ -243,20 +240,21 @@ CGU_PERI |= ((CLK_DIV(AS3525_PLLA_FREQ, AS3525_PCLK_FREQ) - 1) << 2) | 1; /* clk_in = PLLA */ - - /* FIXME: dcache will not be active, since the mmu is not running - * See arm922t datasheet */ - asm volatile( - "mov r0, #0 \n" - "mcr p15, 0, r0, c7, c7 \n" /* invalidate icache & dcache */ - "mrc p15, 0, r0, c1, c0 \n" /* control register */ - "orr r0, r0, #0x1000 \n" /* enable icache */ - "orr r0, r0, #4 \n" /* enable dcache */ - "mcr p15, 0, r0, c1, c0 \n" - : : : "r0" ); - #ifdef BOOTLOADER + mmu_icache_only(); sdram_init(); + + int i; + for(i=0; i< 0x44; i++) /* vectors */ + ((unsigned long*)0x30000000)[i] = ((unsigned long*)0x81000000)[i]; + + ttb_init(); + map_section(0, 0, 0x1000, CACHE_NONE); + map_section(0x81000000, IRAM_ORIG, 1, CACHE_ALL /*CACHE_NONE*/); /* IRAM */ + map_section(0x30000000, DRAM_ORIG, MEMORYSIZE, CACHE_ALL /*CACHE_NONE*/); /* sdram */ + + enable_mmu(); + #endif /* BOOTLOADER */ #if 0 /* the GPIO clock is already enabled by the dualboot function */ Index: firmware/target/arm/as3525/debug-as3525.c =================================================================== --- firmware/target/arm/as3525/debug-as3525.c (revision 20763) +++ firmware/target/arm/as3525/debug-as3525.c (working copy) @@ -46,19 +46,146 @@ unsigned short button_dbop_data(void); #endif -static unsigned read_cp15 (void) +static unsigned read_cp15 (int reg) { unsigned value; - asm volatile ( - "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n":"=r" - (value)::"memory" - ); - return (value); + switch (reg) { + + case 0: /* Register 0 Op2 =0 ID Code */ + asm volatile ( + "mrc p15, 0, %0, c0, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 1: /* Register 1 Control */ + asm volatile ( + "mrc p15, 0, %0, c1, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 2: /* Register 2 Translation Table Base */ + asm volatile ( + "mrc p15, 0, %0, c2, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 3: /* Register 3 Domain Access Control */ + asm volatile ( + "mrc p15, 0, %0, c3, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 4: /*Reg 5 Fault Status of prefetch*/ + asm volatile ( + "mrc p15, 0, %0, c5, c0, 1 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 5: /* Register 5 Fault Status */ + asm volatile ( + "mrc p15, 0, %0, c5, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 6: /* Register 6 Fault address */ + asm volatile ( + "mrc p15, 0, %0, c6, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 7: /* Register 0 Op2 =1 Cache type */ + asm volatile ( + "mrc p15, 0, %0, c0, c0, 1 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 8: /*Reg 9 Cache lockdown Op2 1=Icache*/ + asm volatile ( + "mrc p15, 0, %0, c9, c0, 1 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 9: /*Reg 9 Cache lockdown Op2 0 = Dcache*/ + asm volatile ( + "mrc p15, 0, %0, c9, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 10: /*Reg 10 TLB lockdown Op2 0 = Dcache*/ + asm volatile ( + "mrc p15, 0, %0, c10, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 11: /*Reg 10 TLB lockdown Op2 1=Icache*/ + asm volatile ( + "mrc p15, 0, %0, c10, c0, 1 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 13: /* Register 13 FCSE PID */ + asm volatile ( + "mrc p15, 0, %0, c13, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + + case 15: /* Register 15 Test configuration */ + asm volatile ( + "mrc p15, 0, %0, c15, c0, 0 @ read control reg\n":"=r" + (value)::"memory" + ); + return (value); + return (0xdeadbeef); + } + return (0xdeadbeef); } bool __dbg_hw_info(void) { + char buf[50]; + int line; + + lcd_clear_display(); + lcd_setfont(FONT_SYSFIXED); + + while(1) + { + line = 0; + _DEBUG_PRINTF("[CP15 Registers:]"); + _DEBUG_PRINTF("c00 : 0x%8x ID", read_cp15(0)); + _DEBUG_PRINTF("c01 : 0x%8x CacheType", read_cp15(7)); + _DEBUG_PRINTF("c1 : 0x%8x Control", read_cp15(1)); + _DEBUG_PRINTF("c2 : 0x%8x TTB", read_cp15(2)); + _DEBUG_PRINTF("c3 : 0x%8x DomainCTL", read_cp15(3)); + _DEBUG_PRINTF("c50 : 0x%2x Data FSR", read_cp15(5)); + _DEBUG_PRINTF("c51 : 0x%2x Prefetch FSR", read_cp15(4)); + _DEBUG_PRINTF("c6 : 0x%8x FltAddress", read_cp15(6)); + _DEBUG_PRINTF("c90 : 0x%8x DcacheLock", read_cp15(9)); + _DEBUG_PRINTF("c91 : 0x%8x IcacheLock", read_cp15(8)); + _DEBUG_PRINTF("c100: 0x%8x TLBLockD", read_cp15(10)); + _DEBUG_PRINTF("c101: 0x%8x TLBLockI", read_cp15(11)); + _DEBUG_PRINTF("c13 : 0x%8x FCFE PID", read_cp15(13)); + _DEBUG_PRINTF("c15 : 0x%8x Test", read_cp15(15)); + + lcd_update(); + if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL)) + break; + } + lcd_setfont(FONT_UI); return false; } @@ -84,8 +211,6 @@ _DEBUG_PRINTF("DBOP_DIN: %4x", button_dbop_data()); #endif line++; - _DEBUG_PRINTF("[CP15]"); - _DEBUG_PRINTF("CP15: 0x%8x", read_cp15()); lcd_update(); if (button_get_w_tmo(HZ/10) == (DEBUG_CANCEL|BUTTON_REL)) break; Index: firmware/target/arm/as3525/app.lds =================================================================== --- firmware/target/arm/as3525/app.lds (revision 20763) +++ firmware/target/arm/as3525/app.lds (working copy) @@ -1,4 +1,5 @@ #include "config.h" +#include "cpu.h" ENTRY(start) @@ -6,11 +7,6 @@ OUTPUT_ARCH(arm) STARTUP(target/arm/crt0.o) -#if MEMORYSIZE <= 2 -/* we put the codec buffer in IRAM */ -#define LOWMEM -#endif - #define PLUGINSIZE PLUGIN_BUFFER_SIZE #define CODECSIZE CODEC_SIZE @@ -20,26 +16,24 @@ #define STUBOFFSET 0 #endif -#include "cpu.h" - -#ifdef LOWMEM -#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGINSIZE +#ifdef AMS_LOWMEM +#define DRAMSIZE (DRAM_SIZE - STUBOFFSET - PLUGINSIZE - TTB_SIZE) #define CODECORIG (IRAMORIG + 0x50000 - CODEC_SIZE) #define IRAMSIZE (0x50000 - CODEC_SIZE) #else -#define DRAMSIZE (MEMORYSIZE * 0x100000) - STUBOFFSET - PLUGINSIZE - CODECSIZE +#define DRAMSIZE (DRAM_SIZE - STUBOFFSET - PLUGINSIZE - CODECSIZE - TTB_SIZE) #define CODECORIG (ENDAUDIOADDR) #define IRAMSIZE (0x20000) #endif -#define IRAMORIG 0x0 -#define DRAMORIG 0x30000000 + STUBOFFSET +#define IRAMORIG IRAM_ORIG +#define DRAMORIG (DRAM_ORIG + STUBOFFSET) /* End of the audio buffer, where the codec buffer starts */ #define ENDAUDIOADDR (DRAMORIG + DRAMSIZE) /* Where the codec buffer ends, and the plugin buffer starts */ -#ifdef LOWMEM +#ifdef AMS_LOWMEM #define ENDADDR (ENDAUDIOADDR) #else #define ENDADDR (ENDAUDIOADDR + CODECSIZE) @@ -47,7 +41,7 @@ MEMORY { -#ifdef LOWMEM +#ifdef AMS_LOWMEM CODEC_IRAM : ORIGIN = CODECORIG, LENGTH = CODEC_SIZE #endif IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE @@ -56,8 +50,14 @@ SECTIONS { - loadaddress = 0x30000000; + loadaddress = DRAM_ORIG; + .vectors 0x0: + { + _vectors_start = .; + *(.init.text) + } > DRAM + .text : { _loadaddress = .; @@ -71,10 +71,7 @@ .rodata : { - *(.rodata) /* problems without this, dunno why */ *(.rodata*) - *(.rodata.str1.1) - *(.rodata.str1.4) . = ALIGN(0x4); } > DRAM @@ -89,14 +86,6 @@ *(.eh_frame) } - .vectors IRAMORIG: - { - _vectors_start = .; - *(.init.text) - } > IRAM AT > DRAM - - _vectorscopy = LOADADDR(.vectors); - .iram : { _iramstart = .; @@ -152,7 +141,7 @@ { codecbuf = .; _codecbuf = .; -#ifdef LOWMEM +#ifdef AMS_LOWMEM } > CODEC_IRAM #else } > DRAM Index: firmware/target/arm/as3525/ata_sd_as3525.c =================================================================== --- firmware/target/arm/as3525/ata_sd_as3525.c (revision 20763) +++ firmware/target/arm/as3525/ata_sd_as3525.c (working copy) @@ -41,6 +41,10 @@ #include "stdbool.h" #include "ata_idle_notify.h" #include "sd.h" +#include "mmu-arm.h" +#ifdef BOOTLOADER +#include "common.h" /* for printf() */ +#endif #ifdef HAVE_HOTSWAP #include "disk.h" @@ -81,6 +85,8 @@ #define INTERNAL_AS3525 0 /* embedded SD card */ #define SD_SLOT_AS3525 1 /* SD slot if present */ +static volatile int bad_status = 0; + static const int pl180_base[NUM_VOLUMES] = { NAND_FLASH_BASE #ifdef HAVE_MULTIVOLUME @@ -176,7 +182,10 @@ const int status = MCI_STATUS(INTERNAL_AS3525); if(status & MCI_ERROR) + { + bad_status = status; retry = true; + } wakeup_signal(&transfer_completion_signal); MCI_CLEAR(INTERNAL_AS3525) = status; @@ -708,6 +717,16 @@ dma_retain(); +#ifndef BOOTLOADER +#if 0 + if(write) /* write back cache to memory the region we'll write */ + clean_dcache_range(buf, count * BLOCK_SIZE); + else /* invalidate cache of memory region where we'll read */ + dump_dcache_range(buf, count * BLOCK_SIZE); +#endif +#endif /* ! BOOTLOADER */ + +// invalidate_dcache_range(buf, (count * BLOCK_SIZE)); while(count) { /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH @@ -741,13 +760,19 @@ } if(write) + { + clean_dcache_range(dma_buf, transfer * SECTOR_SIZE); //try SECTOR_SIZE? dma_buf? transfer? dma_enable_channel(0, dma_buf, MCI_FIFO(drive), (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT, DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL); + } else + { dma_enable_channel(0, MCI_FIFO(drive), dma_buf, (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT, DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL); + dump_dcache_range(dma_buf, transfer * SECTOR_SIZE); //try SECTOR_SIZE? dma_buf? transfer? + } MCI_DATA_TIMER(drive) = 0x1000000; /* FIXME: arbitrary */ MCI_DATA_LENGTH(drive) = transfer * card_info[drive].block_size; @@ -756,7 +781,6 @@ (1<<3) /* DMA */ | (9<<4) /* 2^9 = 512 */ ; - wakeup_wait(&transfer_completion_signal, TIMEOUT_BLOCK); if(!retry) { @@ -766,6 +790,10 @@ start += transfer; count -= transfer; } +#ifdef BOOTLOADER + else + printf("status %x", bad_status); +#endif last_disk_activity = current_tick; Index: firmware/target/arm/mmu-arm.S =================================================================== --- firmware/target/arm/mmu-arm.S (revision 20763) +++ firmware/target/arm/mmu-arm.S (working copy) @@ -483,5 +483,80 @@ mov pc, r1 @ .size invalidate_idcache, .-invalidate_idcache + +/* + *void mmu_icache_only(void) + * + */ + .section .text, "ax", %progbits + .align 2 + .global mmu_icache_only + .type mmu_icache_only, %function + +mmu_icache_only: + mov r0, #0 + mcr p15, 0, r0, c7, c7 @ invalidate icache & dcache + mrc p15, 0, r0, c1, c0 @ read control register + orr r0, r0, #1<<12 @ enable icache + bic r0, r0, #1<<2 @ disable dcache + bic r0, r0, #1 @ disable mmu + mcr p15, 0, r0, c1, c0 @ make it so + bx lr + + .size mmu_icache_only, .-mmu_icache_only + +/* + *void mmu_bus_fast(void) + * + */ + .section .text, "ax", %progbits + .align 2 + .global mmu_bus_fast + .type mmu_bus_fast, %function + +mmu_bus_fast: + mrc 15, 0, r0, c1, c0, 0 @Read control reg + bic r0, r0, #0xc0000000 @Set Fast Bus + mcr 15, 0, r0, c1, c0, 0 @Make it so + bx lr + + .size mmu_bus_fast, .-mmu_bus_fast + +/* + *void mmu_bus_sync(void) + * + */ + .section .text, "ax", %progbits + .align 2 + .global mmu_bus_sync + .type mmu_bus_sync, %function + +mmu_bus_sync: + mrc 15, 0, r0, c1, c0, 0 @Read control reg + bic r0, r0, #0xc0000000 @Clear Bus bits + orr r0, r0, #0x40000000 @Set Sync Bus + mcr 15, 0, r0, c1, c0, 0 @Make it so + bx lr + + .size mmu_bus_sync, .-mmu_bus_sync + +/* + *void mmu_bus_async(void) + * + */ + .section .text, "ax", %progbits + .align 2 + .global mmu_bus_async + .type mmu_bus_async, %function + +mmu_bus_async: + mrc 15, 0, r0, c1, c0, 0 @Read control reg + bic r0, r0, #0xc0000000 @Set Fast Bus + mcr 15, 0, r0, c1, c0, 0 @Make it so + bx lr + + .size mmu_bus_async, .-mmu_bus_async + + #endif /* !IMX31L */