Index: firmware/export/as3525.h =================================================================== --- firmware/export/as3525.h (revision 21151) +++ firmware/export/as3525.h (working copy) @@ -41,7 +41,7 @@ /* AS352X MMU Page Table Entries */ /* to be implemented */ -#define TTB_SIZE 0x0 +#define TTB_SIZE 0x4000 #define TTB_BASE_ADDR (DRAM_ORIG + DRAM_SIZE - TTB_SIZE) Index: firmware/SOURCES =================================================================== --- firmware/SOURCES (revision 21151) +++ firmware/SOURCES (working copy) @@ -372,6 +372,7 @@ target/arm/as3525/dma-pl081.c target/arm/as3525/ascodec-as3525.c #ifndef BOOTLOADER +target/arm/mmu-arm.S drivers/generic_i2c.c target/arm/adc-as3514.c target/arm/as3525/audio-as3525.c Index: firmware/target/arm/as3525/dma-pl081.c =================================================================== --- firmware/target/arm/as3525/dma-pl081.c (revision 21151) +++ firmware/target/arm/as3525/dma-pl081.c (working copy) @@ -24,6 +24,7 @@ #include "pl081.h" #include "dma-target.h" #include "panic.h" +#include "mmu-arm.h" static int dma_used = 0; static void (*dma_callback[2])(void); /* 2 channels */ @@ -70,13 +71,35 @@ DMAC_CH_LLI(channel) = 0; /* we use contigous memory, so don't use the LLI */ + /* cache coherence */ + /* clean_dcache_range for transfers from system mem */ + if((flow_controller == DMAC_FLOWCTRL_DMAC_MEM_TO_MEM) || + (flow_controller == DMAC_FLOWCTRL_DMAC_MEM_TO_PERI) || + (flow_controller == DMAC_FLOWCTRL_PERI_MEM_TO_PERI) ) + clean_dcache_range((void *)src, size); + /* dump_dcache_range for transfers to system mem */ + if((flow_controller == DMAC_FLOWCTRL_DMAC_MEM_TO_MEM) || + (flow_controller == DMAC_FLOWCTRL_PERI_PERI_TO_MEM) || + (flow_controller == DMAC_FLOWCTRL_DMAC_PERI_TO_MEM) ) + dump_dcache_range((void *)dst, size); + + if(flow_controller > 3) /* Size must be 0 for peripheral flow control */ + size = 0; + + control |= (1<<31); /* current LLI is expected to trigger terminal count interrupt */ + + /* Protection Bits OF uses 0,0,0*/ + control |= (1<<30); /* cacheable=1 noncacheable=0 */ + control |= (1<<29); /* bufferable=1 nonbufferable=0 */ + control |= (1<<28); /* priveleged=1 user = 0 */ + /* specify address increment */ + if(dst_inc) + control |= (1<<27); + if(src_inc) control |= (1<<26); - if(dst_inc) - control |= (1<<27); - /* OF use transfers of 4 * 32 bits words on memory, i2sin, i2sout */ /* OF use transfers of 8 * 32 bits words on SD */ @@ -84,8 +107,6 @@ control |= (nwords<<15) | (nwords<<12); /* dst/src size */ control |= (size & 0x7ff); /* transfer size */ - control |= (1<<31); /* current LLI is expected to trigger terminal count interrupt */ - DMAC_CH_CONTROL(channel) = control; /* we set the same peripheral as source and destination because we always Index: firmware/target/arm/as3525/system-as3525.c =================================================================== --- firmware/target/arm/as3525/system-as3525.c (revision 21151) +++ firmware/target/arm/as3525/system-as3525.c (working copy) @@ -28,6 +28,7 @@ #include "clock-target.h" #include "fmradio_i2c.h" #include "button-target.h" +#include "mmu-arm.h" #define default_interrupt(name) \ extern __attribute__((weak,alias("UIRQ"))) void name (void) @@ -253,8 +254,15 @@ #ifdef BOOTLOADER sdram_init(); +#else + ttb_init(); + map_section(0, 0, 0x1000, CACHE_NONE); + map_section(0, 0, 1, CACHE_ALL); /* IRAM */ + map_section(0, 0x10000000, 1, CACHE_NONE); /* IRAM */ + map_section(0x30000000, 0x30000000, MEMORYSIZE, CACHE_ALL); /* sdram */ + map_section(0x30000000, 0x40000000, MEMORYSIZE, CACHE_NONE); /* sdram */ + enable_mmu(); #endif /* BOOTLOADER */ - #if 0 /* the GPIO clock is already enabled by the dualboot function */ CGU_PERI |= CGU_GPIO_CLOCK_ENABLE; #endif @@ -319,6 +327,8 @@ "mcr p15, 0, r0, c1, c0 \n" : : : "r0" ); + CGU_PROC &= ~(1<< 5); /* FCLK normal */ + cpu_frequency = CPUFREQ_MAX; } else @@ -329,6 +339,8 @@ "mcr p15, 0, r0, c1, c0 \n" : : : "r0" ); + CGU_PROC |= (1<< 5); /* FCLK /2 */ + cpu_frequency = CPUFREQ_NORMAL; } } Index: firmware/target/arm/as3525/system-target.h =================================================================== --- firmware/target/arm/as3525/system-target.h (revision 21151) +++ firmware/target/arm/as3525/system-target.h (working copy) @@ -25,4 +25,13 @@ #include "clock-target.h" /* CPUFREQ_* are defined here */ +#define PROC_NEEDS_CACHEALIGN +#define CACHEALIGN_BITS 5 /* 2^5 = 32 bytes = cacheline size */ + +#ifdef BOOTLOADER +#define UNCACHED_ADDR(a) (a) +#else +#define UNCACHED_ADDR(a) (a + 0x10000000) +#endif + #endif /* SYSTEM_TARGET_H */ Index: firmware/target/arm/as3525/clock-target.h =================================================================== --- firmware/target/arm/as3525/clock-target.h (revision 21151) +++ firmware/target/arm/as3525/clock-target.h (working copy) @@ -57,17 +57,17 @@ /** ************ Change these to reconfigure clocking scheme *******************/ /* PLL frequencies and settings*/ -#define AS3525_PLLA_FREQ 248000000 /*124,82.7,62,49.6,41.3,35.4 */ +//#define AS3525_PLLA_FREQ 248000000 /*124,82.7,62,49.6,41.3,35.4 */ /* FCLK_PREDIV-> *7/8 = 217MHz 108.5 ,72.3, 54.25, 43.4, 36.17 */ /* *6/8 = 186MHz 93, 62, 46.5, 37.2 */ /* *5/8 = 155MHz 77.5, 51.67, 38.75 */ -#define AS3525_PLLA_SETTING 0x261F +//#define AS3525_PLLA_SETTING 0x261F -//#define AS3525_PLLA_FREQ 384000000 /*192,128,96,76.8,64,54.9,48,42.7,38.4*/ +#define AS3525_PLLA_FREQ 384000000 /*192,128,96,76.8,64,54.9,48,42.7,38.4*/ /* FCLK_PREDIV-> *7/8 = 336MHz 168, 112, 84, 67.2, 56, 48, 42, 37.3*/ /* *6/8 = 288MHz 144, 96, 72, 57.6, 48, 41.1, */ /* *5/8 = 240MHz 120, 80, 60, 48, 40 */ -//#define AS3525_PLLA_SETTING 0x2630 +#define AS3525_PLLA_SETTING 0x2630 /* PLLB not used at this time! */ //#define AS3525_PLLB_FREQ @@ -76,8 +76,8 @@ #define AS3525_FCLK_PREDIV 0 /* div = (8-n)/8 Enter manually & postdiv will be calculated*/ /* 0 gives you the PLLA 1st line choices, 1 the 2nd line etc. */ -#define AS3525_FCLK_FREQ 248000000 /* Boosted FCLK frequency */ -#define AS3525_DRAM_FREQ 62000000 /* Initial DRAM frequency */ +#define AS3525_FCLK_FREQ 192000000 /* Boosted FCLK frequency */ +#define AS3525_DRAM_FREQ 64000000 /* Initial DRAM frequency */ /* AS3525_PCLK_FREQ != AS3525_DRAM_FREQ/1 will boot to white lcd screen */ #define AS3525_PCLK_FREQ AS3525_DRAM_FREQ/1 /* PCLK divided from DRAM freq */ #define AS3525_DBOP_FREQ AS3525_PCLK_FREQ/1 /* DBOP divided from PCLK freq */ @@ -92,11 +92,11 @@ /* Tell the software what frequencies we're running */ #define CPUFREQ_MAX AS3525_FCLK_FREQ #define CPUFREQ_DEFAULT AS3525_PCLK_FREQ -#define CPUFREQ_NORMAL AS3525_PCLK_FREQ +#define CPUFREQ_NORMAL AS3525_PCLK_FREQ/2 /* FCLK */ #define AS3525_FCLK_SEL AS3525_CLK_PLLA -#define AS3525_FCLK_POSTDIV (CLK_DIV((AS3525_PLLA_FREQ*(8-AS3525_FCLK_PREDIV)/8), AS3525_FCLK_FREQ) - 1) /*div=1/(n+1)*/ +#define AS3525_FCLK_POSTDIV 1//(CLK_DIV(((AS3525_PLLA_FREQ)*(8-(AS3525_FCLK_PREDIV))/8), (AS3525_FCLK_FREQ)) - 1) /*div=1/(n+1)*/ /* PCLK */ #ifdef ASYNCHRONOUS_BUS Index: firmware/target/arm/as3525/ata_sd_as3525.c =================================================================== --- firmware/target/arm/as3525/ata_sd_as3525.c (revision 21151) +++ firmware/target/arm/as3525/ata_sd_as3525.c (working copy) @@ -122,7 +122,6 @@ static int sd1_oneshot_callback(struct timeout *tmo) { (void)tmo; - /* This is called only if the state was stable for 300ms - check state * and post appropriate event. */ if (card_detect_target()) @@ -150,7 +149,13 @@ const int status = MCI_STATUS(INTERNAL_AS3525); if(status & MCI_ERROR) + { + char buf[50]; + snprintf(buf, 50, "FUCK 0x%x, status", status); + lcd_puts(0,0, buf); + lcd_update(); retry = true; + } wakeup_signal(&transfer_completion_signal); MCI_CLEAR(INTERNAL_AS3525) = status; @@ -162,7 +167,13 @@ const int status = MCI_STATUS(SD_SLOT_AS3525); if(status & MCI_ERROR) + { + char buf[50]; + snprintf(buf, 50, "FUCKMSD 0x%x, status", status); + lcd_puts(0,0, buf); + lcd_update(); retry = true; + } wakeup_signal(&transfer_completion_signal); MCI_CLEAR(SD_SLOT_AS3525) = status; @@ -617,7 +628,7 @@ } #define UNALIGNED_NUM_SECTORS 10 -static int32_t aligned_buffer[UNALIGNED_NUM_SECTORS* (SECTOR_SIZE / 4)]; +static unsigned char aligned_buffer[UNALIGNED_NUM_SECTORS * SECTOR_SIZE] __attribute__((aligned(32))); static int sd_transfer_sectors(IF_MV2(int drive,) unsigned long start, int count, void* buf, const bool write) @@ -626,7 +637,7 @@ const int drive = 0; #endif int ret = 0; - bool unaligned_transfer = (int)buf & 3; + bool unaligned_transfer = true/*(int)buf & 3*/; /* skip SanDisk OF */ if (drive == INTERNAL_AS3525) @@ -660,6 +671,7 @@ /* 128 * 512 = 2^16, and doesn't fit in the 16 bits of DATA_LENGTH * register, so we have to transfer maximum 127 sectors at a time. */ unsigned int transfer = (count >= 128) ? 127 : count; /* sectors */ + unsigned char* uncached_buffer = UNCACHED_ADDR(aligned_buffer); void *dma_buf; const int cmd = write ? SD_WRITE_MULTIPLE_BLOCK : SD_READ_MULTIPLE_BLOCK; @@ -698,7 +710,7 @@ if(transfer > UNALIGNED_NUM_SECTORS) transfer = UNALIGNED_NUM_SECTORS; if(write) - memcpy(aligned_buffer, buf, transfer * SECTOR_SIZE); + memcpy(uncached_buffer, buf, transfer * SECTOR_SIZE); } else /* Aligned transfers are faster : no memcpy */ dma_buf = buf; @@ -716,13 +728,13 @@ if(write) dma_enable_channel(0, dma_buf, MCI_FIFO(drive), (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT, - DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, 0, DMA_S8, NULL); + DMAC_FLOWCTRL_PERI_MEM_TO_PERI, true, false, transfer * SECTOR_SIZE, DMA_S8, NULL); else dma_enable_channel(0, MCI_FIFO(drive), dma_buf, (drive == INTERNAL_AS3525) ? DMA_PERI_SD : DMA_PERI_SD_SLOT, - DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, 0, DMA_S8, NULL); + DMAC_FLOWCTRL_PERI_PERI_TO_MEM, false, true, transfer * SECTOR_SIZE, DMA_S8, NULL); - MCI_DATA_TIMER(drive) = 0x1000000; /* FIXME: arbitrary */ + MCI_DATA_TIMER(drive) = 0xffffffff; /* FIXME: arbitrary */ MCI_DATA_LENGTH(drive) = transfer * card_info[drive].block_size; MCI_DATA_CTRL(drive) = (1<<0) /* enable */ | (!write<<1) /* transfer direction */ | @@ -734,7 +746,7 @@ if(!retry) { if(unaligned_transfer && !write) - memcpy(buf, aligned_buffer, transfer * SECTOR_SIZE); + memcpy(buf, uncached_buffer, transfer * SECTOR_SIZE); buf += transfer * SECTOR_SIZE; start += transfer; count -= transfer;