diff --git a/firmware/export/config/sansaclipplus.h b/firmware/export/config/sansaclipplus.h index ab4408a..12151a7 100644 --- a/firmware/export/config/sansaclipplus.h +++ b/firmware/export/config/sansaclipplus.h @@ -188,7 +188,7 @@ #define CONFIG_LED LED_VIRTUAL /* Define this if you have adjustable CPU frequency */ -//#define HAVE_ADJUSTABLE_CPU_FREQ +#define HAVE_ADJUSTABLE_CPU_FREQ #define BOOTFILE_EXT "sansa" #define BOOTFILE "rockbox." BOOTFILE_EXT diff --git a/firmware/export/config/sansaclipv2.h b/firmware/export/config/sansaclipv2.h index 262ed36..4b83b32 100644 --- a/firmware/export/config/sansaclipv2.h +++ b/firmware/export/config/sansaclipv2.h @@ -181,7 +181,7 @@ #define CONFIG_LED LED_VIRTUAL /* Define this if you have adjustable CPU frequency */ -//#define HAVE_ADJUSTABLE_CPU_FREQ +#define HAVE_ADJUSTABLE_CPU_FREQ #define BOOTFILE_EXT "sansa" #define BOOTFILE "rockbox." BOOTFILE_EXT diff --git a/firmware/export/config/sansafuzev2.h b/firmware/export/config/sansafuzev2.h index a21eb34..bc22215 100644 --- a/firmware/export/config/sansafuzev2.h +++ b/firmware/export/config/sansafuzev2.h @@ -196,7 +196,7 @@ #endif /* !BOOTLOADER */ /* Define this if you have adjustable CPU frequency */ -//#define HAVE_ADJUSTABLE_CPU_FREQ +#define HAVE_ADJUSTABLE_CPU_FREQ #define BOOTFILE_EXT "sansa" #define BOOTFILE "rockbox." BOOTFILE_EXT diff --git a/firmware/target/arm/as3525/system-as3525.c b/firmware/target/arm/as3525/system-as3525.c index 44e210a..35c60bc 100644 --- a/firmware/target/arm/as3525/system-as3525.c +++ b/firmware/target/arm/as3525/system-as3525.c @@ -464,6 +464,7 @@ void set_cpu_frequency(long frequency) void set_cpu_frequency(long frequency) { int oldstatus = disable_irq_save(); + int cgu_proc, cgu_peri; /* We only have 2 settings */ cpu_frequency = (frequency == CPUFREQ_MAX) ? frequency : CPUFREQ_NORMAL; @@ -471,22 +472,28 @@ void set_cpu_frequency(long frequency) if(frequency == CPUFREQ_MAX) { /* Change PCLK while FCLK is low, so it doesn't go too high */ - CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0 << 2); + cgu_peri = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0 << 2); - CGU_PROC = ((AS3525_FCLK_POSTDIV << 4) | + cgu_proc = ((AS3525_FCLK_POSTDIV << 4) | (AS3525_FCLK_PREDIV << 2) | AS3525_FCLK_SEL); } else { - CGU_PROC = ((AS3525_FCLK_POSTDIV_UNBOOSTED << 4) | + cgu_proc = ((AS3525_FCLK_POSTDIV_UNBOOSTED << 4) | (AS3525_FCLK_PREDIV << 2) | AS3525_FCLK_SEL); /* Change PCLK after FCLK is low, so it doesn't go too high */ - CGU_PERI = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2); + cgu_peri = (CGU_PERI & ~(0xF << 2)) | (AS3525_PCLK_DIV0_UNBOOSTED << 2); } + asm( + "stmia %[reg], {%[proc], %[peri]} \n" + : /* no output */ + : [proc]"r"(cgu_proc), [peri]"r"(cgu_peri), [reg]"r"(&CGU_PROC) + ); + restore_irq(oldstatus); } #endif