Rockbox

Tasklist

FS#2733 - SDRAM init fixes

Attached to Project: Rockbox
Opened by Jens Arnold (amiconn) - Wednesday, 02 November 2005, 23:26 GMT
Last edited by Linus Nielsen Feltzing (linusnielsen) - Saturday, 19 November 2005, 01:27 GMT
Task Type Patches
Category
Status Closed
Assigned To Linus Nielsen Feltzing (linusnielsen)
Operating System
Severity Low
Priority Normal
Reported Version
Due in Version Undecided
Due Date Undecided
Percent Complete 0%
Votes 0
Private No

Details

This patch fixes some (non-critical) problems with the
SDRAM init:

- Set RTIM = 00b (tRC = 3 clocks) for h100. 10b (tRC =
9 clocks) is a waste.
- Enable continous page mode
- Don't perform extra wait between PALL and enabling
refresh - the required time is really short (20 ns)
- Wait between enabling refresh and mode register set
instead - the recommended timing is >= 8 refresh cycles
- No need to reset DACR0[IMRS], the SDRAM controller
resets it automatically

This patch touches bootloader code (only)! It should
not be tried without a BDM connected.
This task depends upon

Closed by  Linus Nielsen Feltzing (linusnielsen)
Saturday, 19 November 2005, 01:27 GMT
Reason for closing:  Accepted
Comment by Jens Arnold (amiconn) - Wednesday, 02 November 2005, 23:35 GMT

Info correction: RTIM was set to 01b for h100, which means
tRC = 6 clocks and is the correct value for > 92 MHz
operation. For <= 92 MHz it's still a waste.

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