Index: firmware/system.c
===================================================================
RCS file: /cvsroot/rockbox/firmware/system.c,v
retrieving revision 1.120
diff -u -r1.120 system.c
--- firmware/system.c	20 Sep 2006 23:21:58 -0000	1.120
+++ firmware/system.c	3 Oct 2006 15:29:58 -0000
@@ -1229,49 +1229,19 @@
 }
 #endif
 
-/* Not all iPod targets support CPU freq. boosting yet */
 #ifdef HAVE_ADJUSTABLE_CPU_FREQ
 void set_cpu_frequency(long frequency)
 {
-    unsigned long postmult;
-
-    if (frequency == CPUFREQ_NORMAL)
-        postmult = CPUFREQ_NORMAL_MULT;
-    else if (frequency == CPUFREQ_MAX)
-        postmult = CPUFREQ_MAX_MULT;
-    else
-        postmult = CPUFREQ_DEFAULT_MULT;
-    cpu_frequency = frequency;
-
-    /* Enable PLL? */
-    outl(inl(0x70000020) | (1<<30), 0x70000020);
-
-    /* Select 24MHz crystal as clock source? */
-    outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020);
-
-    /* Clock frequency = (24/8)*postmult */
-    outl(0xaa020000 | 8 | (postmult << 8), 0x60006034);
-
-    /* Wait for PLL relock? */
-    udelay(2000);
-
-    /* Select PLL as clock source? */
-    outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
-
-#if defined(IPOD_COLOR) || defined(IPOD_4G) || defined(IPOD_MINI) || defined(IRIVER_H10) || defined(IRIVER_H10_5GB)
-    /* We don't know why the timer interrupt gets disabled on the PP5020
-       based ipods, but without the following line, the 4Gs will freeze
-       when CPU frequency changing is enabled.
-
-       Note also that a simple "CPU_INT_EN = TIMER1_MASK;" (as used
-       elsewhere to enable interrupts) doesn't work, we need "|=".
-
-       It's not needed on the PP5021 and PP5022 ipods.
-    */
+    if (frequency == CPUFREQ_MAX) {
+	/* Select PLL as clock source? */
+	outl((inl(0x60006020) & 0x0fffff0f) | 0x20000070, 0x60006020);
+	cpu_frequency = 75000000;
+    } else {
+	/* Select 24MHz crystal as clock source? */
+	outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020);
+	cpu_frequency = 24000000;
+    }
 
-    /* unmask interrupt source */
-    CPU_INT_EN |= TIMER1_MASK;
-#endif
 }
 #elif !defined(BOOTLOADER)
 void ipod_set_cpu_frequency(void)
@@ -1309,6 +1279,19 @@
     outl(-1, 0x6000101c);
 #ifndef HAVE_ADJUSTABLE_CPU_FREQ
     ipod_set_cpu_frequency();
+#else
+    /* Enable PLL? */
+    outl(inl(0x70000020) | (1<<30), 0x70000020);
+
+    /* Select 24MHz crystal as clock source? */
+    outl((inl(0x60006020) & 0x0fffff0f) | 0x20000020, 0x60006020);
+
+    /* Clock frequency = (24/8)*postmult */
+    outl(0xaa020000 | 8 | (25 << 8), 0x60006034);
+
+    /* Wait for PLL relock? */
+    udelay(2000);
+
 #endif
     ipod_init_cache();
 #endif