diff --strip-trailing-cr -u -r rockbox/trunk/firmware/target/arm/ata-sd-pp.c rockbox-daily-20081131/firmware/target/arm/ata-sd-pp.c
--- rockbox/trunk/firmware/target/arm/ata-sd-pp.c	2008-11-21 22:23:31.000000000 +0200
+++ rockbox-daily-20081131/firmware/target/arm/ata-sd-pp.c	2008-11-21 22:46:00.000000000 +0200
@@ -758,7 +758,7 @@
     /* TODO: Add DMA support. */
 
     mutex_lock(&sd_mtx);
-
+    sd_enable(true);
     sd_led(true);
 
 sd_read_retry:
@@ -844,6 +844,7 @@
     while (1)
     {
         sd_led(false);
+        sd_enable(false);
         mutex_unlock(&sd_mtx);
 
         return ret;
@@ -873,7 +874,7 @@
     int bank;
 
     mutex_lock(&sd_mtx);
-
+    sd_enable(true);
     sd_led(true);
 
 sd_write_retry:
@@ -972,6 +973,7 @@
     while (1)
     {
         sd_led(false);
+        sd_enable(false);
         mutex_unlock(&sd_mtx);
 
         return ret;
diff --strip-trailing-cr -u -r rockbox/trunk/firmware/target/arm/system-pp502x.c rockbox-daily-20081131/firmware/target/arm/system-pp502x.c
--- rockbox/trunk/firmware/target/arm/system-pp502x.c	2008-10-10 18:36:54.000000000 +0300
+++ rockbox-daily-20081131/firmware/target/arm/system-pp502x.c	2008-11-22 17:11:44.000000000 +0200
@@ -222,7 +222,8 @@
         CLOCK_SOURCE  = 0x20007777; /* source #1, #2, #3, #4: PLL (#2 active) */
         scale_suspend_core(false);
         break;
-#if 0 /******** CPUFREQ_NORMAL = 24MHz without PLL ********/
+      /******** CPUFREQ_NORMAL = 24MHz without PLL ********/
+#if (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024)
       case CPUFREQ_NORMAL:
         cpu_frequency =  CPUFREQ_NORMAL;
         PLL_CONTROL  |=  0x08000000;
@@ -235,7 +236,7 @@
         IDE0_CFG     &= ~0x10000000; /* clear ">65MHz" bit */
 #endif
         scale_suspend_core(false);
-        PLL_CONTROL  &= ~0x80000000; /* disable PLL */
+        PLL_CONTROL   = 0x0a220501; /* 30 MHz = (5/1 * 24MHz) / 4 */
         DEV_INIT2    &= ~INIT_PLL;   /* disable PLL power */
         break;
 #else /******** CPUFREQ_NORMAL = 30MHz with PLL ********/