Cowon D2 Info
Introduction
The Cowon D2 is a flash-based DAP/PMP with a 320x240 touchscreen, SD card slot, FM radio and TV-Out. It comes in 2/4/8/16GB sizes, and there is also a version with DAB digital radio. There is also an updated model known as the D2+, which features an updated case design and new firmware featuring BBE+ audio processing.
Hardware
Disassembly and pictures at
AnythingButIpod.
Port Status
The D2 port status is:
unstable (see
TargetClassifications)
Most Rockbox functions are usable on the D2/D2+, including music playback and most plugins, but there are a number of shortcomings that prevent it from being a fully supported target:
- An SD card is required to use many features, since the internal flash memory is read-only in Rockbox.
- There is only basic touchscreen support.
Rockbox runs on all D2 and D2+ variants (2 / 4 / 8 / 16GB, with or without DAB/DMB).
NOTE: Newer D2+ hardware revisions use an updated power management chip, and some functionality is not yet implemented on these players (eg. touchscreen support).
The touchscreen can be used in two modes, either a 3x3 grid mode which divides the screen into areas to emulate a set of physical buttons (the default setting), or "absolute point" mode where the touchscreen is used to point to items on the screen. Further work is required to make the UI more usable with a touchscreen in general.
WARNING: The SD driver is still in development and may contain bugs. There have been reports of SD cards becoming unusable after being used with Rockbox on the D2. Only using risk old, low-capacity SD cards until we are satisfied the driver is safe to use. You have been warned!
Installation
The Rockbox bootloader needs to be patched into an original Cowon firmware, which is then flashed to the D2 using the normal firmware upgrade process. This provides a dual-boot mechanism between Rockbox and the Cowon firmware (to boot Rockbox, set the HOLD switch immediately after power on).
You will need a copy of your current Cowon firmware, ie. the D2(N).bin file from the '1' folder in an official firmware update archive (these can be downloaded from
Cowon Global). NOTE: The filename depends on the firmware version as shown in the table below:
| |
D2 |
D2+ |
| FW 1.xx / 4.xx |
D2.bin |
D2_P.bin |
| FW 2.xx / 3.xx |
D2N.bin |
D2N _P.bin |
Automatic Installation
The current release of Rockbox Installation Utility doesn't support the D2. Preliminary support is in SVN, and you can try binaries from SVN. See
this forum announcement for details.
The utility should be able to detect and install Rockbox on your player. For more info visit the utility's
Wiki page.
Manual Installation
- Build or download the bootloader binary (bootloader-cowond2.bin)
- Patch this into your original Cowon firmware using mktccboot
- Build or download the main Rockbox build (rockbox.zip)
- A pre-built "bleeding edge" zip can be found here.
- Unzip rockbox.zip to the root of either an SD card or the internal memory
- If an SD card is inserted at power on, Rockbox will boot from that card and use it as the primary drive for storing settings, etc.
- If there is no SD card inserted, Rockbox will boot from the internal memory, and it will not be possible to save settings etc.
The D2N-patched.bin can then either be uploaded to the player using tcctool (remember to set the HOLD switch as this is a dual-boot image), or flashed to the player using the usual firmware upgrade method. To do this rename the file according to the table above, then copy it to the root of the player and turn on the player - this will start the upgrade process.
It is also possible to 'preview' a main Rockbox binary on the device, by using tcctool to upload the rockbox.bin file (NOT rockbox.d2). Note that this is only suitable for minor development/testing purposes, since plugins/codecs are not updated when using this method.
Known Problems
- The current situation of using an SD card as the primary drive is not ideal. This is a compromise that allows Rockbox to be useful on the D2 until a read/write-capable driver is written for the internal NAND.
- Files on the internal NAND show up under <microSD1> in the File browser.
- If Rockbox is booted from an SD card, and the card is then removed later, no files at all will be visible in the File browser (even those on the internal NAND) until a card is re-inserted.
- If booting without an SD card, the filesystem will be read-only and various errors will be seen for example "Error accessing playlist control file" when starting playback, and settings cannot be saved.
- Battery readings change significantly when charging via USB or AC adapter (note: we might be able to use the SoC ADC channel 1 for battery monitoring instead of the PCF BATVOLT ADC).
- The software USB stack is unreliable when enabled (frequently losing connection, freezing, and/or displaying panic errors). Unplugging the USB cable consistently freezes the player.
- The real time clock (RTC) does not work properly.
- Limited support for players with a PCF50635 power management chip.
- Currently no touchscreen
- Charger detection is incorrect
Work To Be Done
Things that should be done before the port can be considered truly usable:
- Provide a touchscreen-capable default WPS.
- Make the USB driver work reliably and enable it (at least access to the SD card, HID and/or USB serial should be possible)
- Implement the RTC alarm / wakeup
- Make Rockbox the default boot option (currently the HOLD switch is needed)
- Investigate/calibrate battery readings and establish whether we need to do anything to enable full charging.
- Battery readings have been calibrated according to this battery_bench (18hrs 47mins, playing MP3 VBR from an SD card with r21720+FS#10415).
- Write the manual.
- Provide better installation support in RockboxUtility, which knows to prefer installing over the SD card.
Things that would be nice to have:
- Implement support for MMC cards.
- Investigate use of the co-processor.
- Investigate use of DMA transfers (eg. could a mem-mem transfer be used to speed up copying the Rockbox framebuffer to the hardware framebuffer?)
- Recording (built-in mic, FM, line in via adapter cable)
- Investigate what can be done with the line out and TV out.
...and probably many more things I haven't even thought of yet.
Forum Thread
The New Ports forum thread for the D2 is at:
https://forums.rockbox.org/index.php?topic=10164.0
Firmware Upgrade
Firmware upgrades are in the standard Telechips "dual-crc" format (more info at
TelechipsInfo). Firmware upgrade files (D2.bin or D2N.bin) are a raw, unencrypted dump of SDRAM (base address 0x20000000). This is loaded from flash during normal startup by an 8KB Boot ROM.
The device also has a USB boot mode, and can be accessed via the tcctool utility (in
Rockbox SVN). USB boot mode is enabled by powering the unit off, then holding any of the keypad buttons ('-', 'M', or '+') while inserting the USB cable.
Note that the "dual-crc" format does not appear to be required when using USB boot mode.
Firmware Versions
There are several variants of the D2 retail firmware tailored for different markets and hardware versions. The variant is identified by the Major version number.
| Major version |
Hardware |
Features |
Default Language |
| 1.xx |
D2 DMB/DAB |
MSC, Flash skins, Dictionary |
Korean |
| 2.xx |
D2 |
MSC/MTP |
English |
| 3.xx |
D2 |
MSC, Flash skins, Dictionary |
Korean |
| 4.xx |
D2 DAB/DMB |
MSC/MTP |
English |
| 5.xx |
D2 TV (Japan) |
? |
? |
Firmware archives downloaded from Cowon are split into three subfolders, each containing one or more .bin files.
- "0" - Applying this D2.bin will perform a low-level format of the D2's internal flash. Use with care (and do not upload it with Tcctool!).
- "1" - D2.bin contains the main firmware image. You can "preview" different firmwares by uploading this file with Tcctool. This is the file that is patched by mktccboot.
- "2" - D2_rs.bin is some form of resource (graphics) archive. D2_font.bin contains the UI font. Both of these can be patched to provide different "themes", using utilities available at the iAudiophile.net forums.
D2+ firmwares follow the same version numbering and file naming scheme, except that file names begin with D2_P. It appears that the only reason a D2+ firmware cannot be flashed to a standard D2 is that the new firmware exceeds the 4Mb size limitation present in the standard D2 firmware flash routine (tcctool can be used to get around this limitation).
Technical Information
The TCC7801 has significant similarities to earlier Telechips
SoCs such as the 76x (for which a datasheet was posted to the rockbox-dev mailing list
here). The following hardware registers appear to be the same as the 76x:
| Register Range |
76x base |
7801 base |
| Timers/Counters |
0x80000200 |
0xF3003000 |
| ADC Controller |
0x80000A00 |
0xF3004000 |
| Audio In/Out |
0x80000000 |
0xF0059000 |
| SDRAM Controller* |
0xF0000000 |
0xF1000000 |
(*the SDRAM controller appears to have a duplicate range at 0xF1001000, presumably for a second SDRAM bank?)
The IRQ/FIQ controller (base 0xF3001000) seems to be largely the same as the 76x (base 0x80000100) except there appears to be a priority mechanism whereby the IRQ number of the highest-priority IRQ occurring can be read from address 0xF3001080. 0xF3001044 bits 0,1 appear to be a master IRQ/FIQ enable flag.
IRQ numbers do not appear to be the same as 76x, although Cowon helpfully left quite a lot of debug text in their firmware (eg. search for '_HISR') which should help identify some of these.
GPIO ports
GPIO ports can be accessed as follows:
0xF005A0x0 = current value of GPIOx
0xF005A0x4 = direction for each pin (set = output, clear = input)
0xF005A0x8 = bits to set
0xF005A0xC = bits to clear
For example, the hold switch state is available by reading bit 3 of 0xF005A020. To enable the LCD backlight, write bit 6 to 0xF005A028.
GPIOA (base = 0xF005A020)
| A0 |
out |
I2C SCL |
PMU and WM8985 on this I2C bus, amongst others. |
| A1 |
in/out |
I2C SDI |
|
| A2 |
in |
~ON_OFF |
cleared when On/Off pressed |
| A3 |
in |
~HOLD |
cleared when Hold switch enabled |
| A4 |
in |
SD_WP |
set when SD write-protect switch is enabled |
| A6 |
out |
|
LCD backlight enable (PCF50606 only) |
| A16 |
out |
|
LCD panel power (?) |
| A24 |
out |
LCD_CS |
|
| A25 |
out |
LCD_SCL |
see LCD panel datasheet |
| A26 |
in/out |
LCD_SDI |
|
GPIOB (base = 0xF005A040)
| B2 |
in |
|
set on keypad press (-, M, +) |
| B26 |
in |
~SDMMC |
SD/MMC present (active low) |
| B29 |
in |
~PCFINT |
PCF50606 interrupt (active low) |
GPIOC (base = 0xF005A060)
| C24 |
out |
|
Required for SD cards to power on properly (active low) |
| C26 |
in |
|
Battery Charging (PCF50606 only, active low) |
| C26 |
in |
|
Touchscreen Pressed (TSC200x only, active low) |
| C29 |
out |
CLOCK |
FM 3-wire interface |
| C30 |
in/out |
DATA |
FM 3-wire interface |
| C31 |
out |
NRW |
FM 3-wire interface |
GPIOD (base = 0xF005A080)
| D23 |
in |
AC Charger Connected |
GPIOE (base = 0xF005A0A0)
| Unknown (always 0x0FFFFFFF) |
ADCs
- ADC0 provides an indication of the keypad state for the '-', 'M' and '+' buttons.
- ADC1 appears to provide an indication of current battery voltage (note that the actual voltage can be read from the PCF50606 chip).
- ADCs 2-3 are unknown (both appear to fluctuate with a wide range of values).
LCD
The LCD is powered on and off using the sequences given in the LTV250QV datasheet. The LCD is not visible at all unless the backlight is enabled, so it is necessary to first set the backlight intensity using PCF50606 register 0x35 and then enable it using GPIOA6.
Hardware registers for the LCD controller are TBC (base = 0xF0000000), however a working initialisation sequence has been identified from the OF.
NAND flash
The following D2's have been observed:
- 2GB : 1x SAMSUNG K9LAG08U0M (8192 blocks, 128 pages per block, 2048+64 bytes page size)
- 4GB : 2x SAMSUNG K9LAG08U0M ""
- 8GB : 2x SAMSUNG K9LBG08U0M (8192 blocks, 128 pages per block, 4096+128 bytes page size)
- 16GB : 4x SAMSUNG K9LBG08U0M ""
See
TelechipsNAND for further information.
Audio
The SVN build includes basic but working WM8985 and PCM drivers. The DAC is configured as I2S slave to the Telechips
SoC, in contrast to the other Rockbox drivers which use the WM codec as master.
Hardware equalizer bands EQ1 and EQ5 are used to provide bass and treble controls. At present a full 5-band equalizer is only available using software EQ (this is currently unusable due to keymap problems).
The WM8985 is powered by the PCF50606 regulator D3REG. In the original firmware this is configured for 3.3v output by sending 0xF8 to D3REGC1 (0x26).
Power management
Different D2 hardware revisions contain different PMU chips. It is possible to detect which is present at runtime by configuring GPIOA6 for input and testing its value. If the value is 0, a PCF50606 is present and the port should be configured for output (for use as a backlight power toggle). If the value is 1, a PCF50635 is present and GPIOA6 should be configured for input (use currently unknown).
D2 and older D2+ revisions
These models contain a Philips PCF50606. The original firmware sends a number of initialisation commands to the PCF50606 to control the voltages that go to the various chips in the D2. It would be helpful to work out which regulator outputs each chip is connected to. The following tabe lists the initial values set up by the Cowon firmware.
| Register |
Address |
Value |
Purpose |
Application |
| DCDEC1 |
0x1F |
0xE4 |
2.1v output |
|
| DCUDC1 |
0x21 |
0xE7 |
3.0v output |
|
| IOREGC |
0x23 |
0xF5 |
3.0v output |
|
| D1REGC1 |
0x24 |
0xF5 |
3.0v output |
|
| D2REGC1 |
0x25 |
0xE9 |
1.8v output |
|
| D3REGC1 |
0x26 |
0xF8 |
3.3v output |
WM8985 AVDD1,AVDD2,DBVDD |
| LPREGC1 |
0x27 |
0x00 |
0.9v output |
|
| LPREGC2 |
0x28 |
0x02 |
LPREG off in standby, reset in standby |
|
| PWMC1 |
0x35 |
0xE9 |
PWM freq/duty cycle |
LCD backlight |
| GPOC1 |
0x38 |
0x03 |
Configure GPO0 for PWM output |
LCD backlight |
Newer D2+ revisions
These models contain a Philips PCF50635, which appears to be at least partly register-compatible with the PCF50633 used by the
OpenMoko FreeRunner project. Full documentation for the PCF50633 can be found
here, and a driver was added to the linux kernel as of 2.6.29.
Touchscreen
On older D2s, the touchscreen is managed by the PCF50606 and can be read using the PMU's 10-bit ADC (see datasheet). A TSCPRES interrupt is raised when a press has been registered.
Newer D2+ models contain a PCF50635 PMU, which does not contain a touchscreen controller. Instead a dedicated touchscreen controller is used, which appears to be the Texas Instruments
TSC2007 (unconfirmed).
X/Y coordinates can be read from I2C registers 0x80/0x90 (slave address 0x90). This returns a single reading with 16-bit resolution (use the most significant 10 bits to get the same resolution as the PCF50606).
GPIOC26 is an indication of whether the touch screen is pressed (active low). It is unknown whether an IRQ can be triggered from this GPIO, so a polling mechanism may have to be used.
Emulator
Taken off the forum, here is an emulator for the Cowon D2:
cowon_emulator.zip
CategoryFrontpage: Cowon D2 Port Index [New Ports]
Copyright © by the contributing authors.
