Rockbox on the Sansa View
This project is part of the Google Summer of Code 2009 project
The aim of this project is to
- Disassembly of the Views OF.
- LCD Driver
- Button Driver
- Flash Driver
- Audio Driver
Currently working on:
- Many registers seem to match PP502x ones. This includes Mailboxes, Interrupts, Timers, Processor Control, Cache Control and GPIOs.
- The registers for LCD and MMC/IO are different to earlier Portal Player implementations
- Locate OF hardware initialisation routines
For the disassembly I arbitrarily chose the 01.01.06a revision of the OF to work on, which is available at http://daniel.haxx.se/sansa/view.html
Before disassembling the bootloader, I stripped the first 64 bytes, which contain header information.
Thanks to funman for pointing out to me that infact there isn't a 64 byte header (why I thought that I don't know), and also for the RAM insights below. Re-disassembled with the correct file (TODO: update offsets below). Both the bootloader and main OF binary are mixed thumb and 32bit ARM code.
IRAM is located at 0x40000000. There appears to be at least 96k worth?
The OF maps the RAM to 0x10F00000. The bootloader appears to be copied to the start of this address, and then uses this offset to call various bits of code when running.
The code is a little generic? It tests if a COP is present, and also tries to setup 64Mb of RAM, even though the View has 32 (as indicated by the part number on the Samsung chip).
|| COP Test - if true, initialise COP_CTL
|| Nvidias own 6100 webpage implies single core, with a secondary Audio/Video processor?
|| USB init
|| See also 0x5352 & 0x53A4. Seems to be using the same registers and values as previous PP502Xs.
|| GPIO initialisation - E, F, J, B, H and more
|| See also 0xC350 and 0xBB74
|| set r1 to 0 to turn off, otherwise on
|| GPIO H, I and O initialisation
|| The 6100 seems to have 4 more GPIOs than the PP502Xs
I've also been experimenting with code hoping to find some clues I can use as references when looking at the disassembly, by using code like:
for (i = 0; i <= 31; i++)
within bootloader/main-pp.c, and then running it as a replacement to the OF (although a lot of the HW initialisation will already be done by that point?).
makes the entire LCD white
appears to turn off the LCD (i.e. it seems to be more than just turning the backlight off).
Turns ON the button light
Turns off the button light
/* Disable interrupts on this core */
/* Mask them on both cores */
CPU_INT_DIS = -1;
DEV_RS = -1;
CPU_CTL = 0x40000000;
This is an amalgam of other PP targets shutdown code - on the View it actually resets the device (useful since I can use it to let me know when certain code/sleeps have finished).
TODO: find the real reboot/shutdown code.
Turn the backlight on and off.
The first line corrupts the display (skews it). The second restores it to normal.
At first I thought the LCD was based on a Renesas controller, since the disassembly looked similar to the e200. This unfortunately turned out to be a massive red herring. Infact the controller appears to be an Ilitek ILI9320
(although this model is very nearly identical register-wise to the Renesas R61505).
So far I'm using the values from the disassembly in the LCD init routines, rather than the application notes
. Despite this wealth of information I've yet to have any success in writing to the display.
The exact same functions/layout are in both the bootloader and main firmware images:
Boot Index: 0x62818
OF Index: 0x321DBC
The function name refers to lcd-view.c
|| Boot Offset
|| OF Offset
|| This touches a lot of GPIOs - all really LCD related?
|| backlight(bool r0)
|| screen power off/sleep ?
|| screen power on/wake ?
|| r0=0xF0 // LCD_WIDTH
|| r0=0x140 // LCD_HEIGHT
There are many references in the main OF binary to OpenMAX
. Khronos were mentioned as the developer of a reference design when the Nvidia 6100 SOC was launched.
I've sent emails to both Nvidia and Dragon Display Tech requesting technical information/data sheets. No response has so far been received.
Copyright © by the contributing authors.