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Wiki > Main > RockChipNanoB

RockChip Nano-B (RkNano-B)


This is the page for the RockChip Nano-B system-on-chip. Little is known currently about this chip for which we do not have any kind of documentation. This page tries to summarize what is known. It is believed that the RKNanoB is somehow related with the RK27xx and the RK28xx. The ARM core has been identified as a Cortex-M3 (from CPUID). The official brief for rknano-C confirms the core and specifies 100MHz max core frequency, 128kB of static ram and 96kB of dram.

System Model


  • Processor: ARM Cortex-M3

System Memory Map

The system memory map is consistent with the ARMv7 Architecture, we refer to this document for more information.

Start End Name Description
0x01000000 0x01FFFFFF IRAM on-chip RAM
0x20000000 0x3FFFFFFF SRAM on-chip RAM
0x40000000 0x5FFFFFFF Peripherals on-chip peripherals
0x60000000 0x7FFFFFFF RAM RAM (cached)
0x80000000 0x9FFFFFFF RAM RAM (write-through)
0xA0000000 0xBFFFFFFF Device Shared device space
0xC0000000 0xDFFFFFFF Device Non-shared device space
0xE0000000 0xFFFFFFFF System System region

The system region contains all the standard ARMv7 devices:
Start End Name Description
0xE000E000 0xE000E00F ICTAC Interrupt Controller Type and Auxillary Control
0xE000E010 0xE000E0FF SysTick System timer
0xE000E100 0xE000ECFF NVIC External Interrupt Controller
0xE000ED00 0xE000ED8F SCB System Control Block

The peripherals region contains the following blocks:
Start End Name Description
0x40010000 ? Unknown Unknown

From ARM Cortex-M3, it has two bit-band regions:
Start End Name Description
0x20000000 0x20100000 SRAM 1MB on-chip RAM region
0x22000000 0x24000000 SRAM bit-band SRAM alias
0x40000000 0x40100000 Peripheral 1MB peripheral region
0x42000000 0x44000000 Peripheral bit-band peripheral alias

The RKNano-B seems to use the RAM region for peripherals because it doesn't have external RAM. The following regions are known:
Start End Name Description
0x62000000 0x6200ffff USB USB core

USB core

The USB core is mapped at address 0x62000000. It seems to be consistent with the Synopsys USB OTG HS controller which can be found the STM32 F2 line for example. See the reference manual of the STM32 F2 for the register description.

DFU Mode

Similarly to the Rockchip27xx, it has a USB DFU mode which allows to upload code to the device. This mode is enhanced with respect to the Rockchip27xx since one can send an arbitrary large binary: it must be split up in pieces of 4096 bytes. The payload is encrypted in continuous mode using XOR routine of the Rockchip27xx. The binary is standard Cortex image: it starts with the address of the stack, then 30 entries for the vector table and then the code. As with the Rockchip27xx, the data sent is appended two bytes of CRC. The code is loaded at 0x01000000.

-- AmauryPouly - 16 Mar 2013

I Attachment Action Size Date Who Comment
Rockchip_RKnano-C_Audio_Processor_2011-10.pdfpdf Rockchip_RKnano-C_Audio_Processor_2011-10.pdf manage 569.9 K 13 Dec 2013 - 23:09 IvanMaslyuk  
r8 - 02 Apr 2021 - 20:46:07 - UnknownUser

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